PCF8564A datasheet(37/86 Pages) NXP

37 / 86 page

NXP Semiconductors

PCA2131

Nano-power highly accurate RTC with integrated quartz crystal for automotive applications

To control the timer function and timer output, the registers Control_2, Watchdg_tim_ctl,

and Watchdg_tim_val are used.

7.11.1 Register Watchdg_tim_ctl

Bits labeled as T are unused and return 0 when read.

Bit

Symbol

WD_CD

TI_TP

TF[1:0]

Reset

value

Table 55. Watchdg_tim_ctl - watchdog timer control register (address 35h) bit allocation

Bits labeled as T are unused and return 0 when read.

Bit

Symbol

Value

Description

watchdog timer interrupt disabled

WD_CD

watchdog timer interrupt enabled;

the interrupt pin INTA/B is activated when timed

out

unused

the interrupt pin INTA/B is configured to generate a

permanent active signal when MSF is set

TI_TP

the interrupt pin INTA/B is configured to generate a

pulsed signal when MSF flag is set (see Figure 17)

4 to 2

000

unused

timer source clock for watchdog timer

64 Hz

4 Hz

1⁄4 Hz

1 to 0

TF[1:0]

1⁄64 Hz

Table 56. Watchdg_tim_ctl - watchdog timer control register (address 35h) bit description

7.11.2 Register Watchdg_tim_val

Bit

Symbol

WATCHDG_TIM_VAL[7:0]

Reset

value

Table 57. Watchdg_tim_val - watchdog timer value register (address 36h) bit allocation

PCA2131

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.0 — 26 July 2021

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