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PCF8564A 数据表(PDF) 41 Page - NXP Semiconductors |
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PCF8564A 数据表(HTML) 41 Page - NXP Semiconductors |
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41 / 86 page ![]() NXP Semiconductors PCA2131 Nano-power highly accurate RTC with integrated quartz crystal for automotive applications 7.12.2 Timestamp mode The timestamp function has two different modes selected by the control bit TSM (timestamp mode) in register Timestp_ctl: • If TSM is logic 0 (default): in subsequent trigger events without clearing the timestamp flags, the last timestamp event is stored • If TSM is logic 1: in subsequent trigger events without clearing the timestamp flags, the first timestamp event is stored The timestamp function also depends on the control bit BTSE in register Control_3, see Section 7.12.4. 7.12.3 Timestamp registers 7.12.3.1 Register Timestp_ctl1/2/3/4 Bits labeled as T are unused and return 0 when read Bit 7 6 5 4 3 2 1 0 Symbol TSM TSOFF T SUBSEC_TIMESTP[4:0] Reset value 0 0 0 0 0 0 0 0 Table 64. Timestp_ctl1/2/3/4 - timestamp control register (address 14h/1Bh/22h/29h) bit allocation Bits labeled as T are unused and return 0 when read Bit Symbol Value Description 0 in subsequent events without clearing the timestamp flags, the last event is stored 7 TSM 1 in subsequent events without clearing the timestamp flags, the first event is stored 0 timestamp function active 6 TSOFF 1 timestamp function disabled 5 - - unused 4 to 0 SUBSEC_TIMESTP[4:0] 1⁄16 second timestamp information coded in BCD format when 100TH_S_DIS = ‘1’[1], 1⁄20 second timestamp information coded in BCD format when 100TH_S_DIS = ‘0’; Table 65. Timestp_ctl1/2/3/4 - timestamp control register (address 14h/1Bh/22h/29h) bit description [1] The time recorded in the time stamps, when in 100 Hz disable mode (1 Hz mode), will be at least two 16 Hz clocks behind the timestamp event and no more than 3 clocks behind. If the exact time of the timestamp event is required then subtract 2 subseconds from the timestamp value and the result will have -0 subseconds to +1 subseconds of uncertainty. PCA2131 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 1.0 — 26 July 2021 41 / 86 |
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