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PCF8564A 数据表(PDF) 82 Page - NXP Semiconductors

部件名 PCF8564A
功能描述  Nano-power highly accurate RTC with integrated quartz crystal for automotive applications
PDF  86 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8564A 数据表(HTML) 82 Page - NXP Semiconductors

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NXP Semiconductors
PCA2131
Nano-power highly accurate RTC with integrated quartz crystal for automotive applications
Tables
Tab. 1.
Ordering information ..........................................2
Tab. 2.
Ordering options ................................................2
Tab. 3.
Pin description ...................................................4
Tab. 4.
Register overview ..............................................7
Tab. 5.
Control_1 - control and status register 1
(address 00h) bit allocation .............................10
Tab. 6.
Control_1 - control and status register 1
(address 00h) bit description ...........................10
Tab. 7.
Control_2 - control and status register 2
(address 01h) bit allocation .............................11
Tab. 8.
Control_2 - control and status register 2
(address 01h) bit description ...........................11
Tab. 9.
Control_3 - control and status register 3
(address 02h) bit allocation .............................11
Tab. 10. Control_3 - control and status register 3
(address 02h) bit description ...........................12
Tab. 11. Control_4 - control and status register 4
(address 03h) bit allocation .............................12
Tab. 12. Control_4 - control and status register 4
(address 03h) bit description ...........................12
Tab. 13. Control_5 - control and status register 5
(address 04h) bit allocation .............................13
Tab. 14. Control_5 - control and status register 5
(address 04h) bit description ...........................13
Tab. 15. CLKOUT_ctl - CLKOUT control register
(address 13h) bit allocation .............................13
Tab. 16. CLKOUT_ctl - CLKOUT control register
(address 13h) bit description ...........................14
Tab. 17. Temperature measurement period .................. 15
Tab. 18. CLKOUT frequency selection ..........................16
Tab. 19. Aging_offset - crystal aging offset register
(address 30h) bit allocation .............................16
Tab. 20. Aging_offset - crystal aging offset register
(address 30h) bit description ...........................16
Tab. 21. Frequency correction at 25 °C, typical ............ 17
Tab. 22. Power management control bit description ......18
Tab. 23. Output pin BBS ............................................... 22
Tab. 24. Reset - software reset control (address
05h) bit description ..........................................25
Tab. 25. 100th Seconds - 100th seconds (address
06h) bit allocation ............................................26
Tab. 26. 100th Seconds - 100th seconds register
(address 06h) bit description ...........................26
Tab. 27. 100th Seconds coded in BCD format ..............27
Tab. 28. Seconds - seconds and clock integrity
register (address 07h) bit allocation ................ 27
Tab. 29. Seconds - seconds and clock integrity
register (address 07h) bit description .............. 27
Tab. 30. Seconds coded in BCD format ........................27
Tab. 31. Minutes - minutes register (address 08h) bit
allocation ......................................................... 28
Tab. 32. Minutes - minutes register (address 08h) bit
description ....................................................... 28
Tab. 33. Hours - hours register (address 09h) bit
allocation ......................................................... 28
Tab. 34. Hours - hours register (address 09h) bit
description ....................................................... 28
Tab. 35. Days - days register (address 0Ah) bit
allocation ......................................................... 29
Tab. 36. Days - days register (address 0Ah) bit
description ....................................................... 29
Tab. 37. Weekdays - weekdays register (address
0Bh) bit allocation ........................................... 29
Tab. 38. Weekdays - weekdays register (address
0Bh) bit description ......................................... 29
Tab. 39. Weekday assignments .................................... 30
Tab. 40. Months - months register (address 0Ch) bit
allocation ......................................................... 30
Tab. 41. Months - months register (address 0Ch) bit
description ....................................................... 30
Tab. 42. Month assignments in BCD format ..................30
Tab. 43. Years - years register (address 0Dh) bit
allocation ......................................................... 31
Tab. 44. Years - years register (address 0Dh) bit
description ....................................................... 31
Tab. 45. Second_alarm - second alarm register
(address 0Eh) bit allocation .............................33
Tab. 46. Second_alarm - second alarm register
(address 0Eh) bit description .......................... 34
Tab. 47. Minute_alarm - minute alarm register
(address 0Fh) bit allocation .............................34
Tab. 48. Minute_alarm - minute alarm register
(address 0Fh) bit description ...........................34
Tab. 49. Hour_alarm - hour alarm register (address
10h) bit allocation ............................................34
Tab. 50. Hour_alarm - hour alarm register (address
10h) bit description ..........................................34
Tab. 51. Day_alarm - day alarm register (address
11h) bit allocation ............................................ 35
Tab. 52. Day_alarm - day alarm register (address
11h) bit description ..........................................35
Tab. 53. Weekday_alarm - weekday alarm register
(address 12h) bit allocation .............................36
Tab. 54. Weekday_alarm - weekday alarm register
(address 12h) bit description ...........................36
Tab. 55. Watchdg_tim_ctl - watchdog timer control
register (address 35h) bit allocation ................ 37
Tab. 56. Watchdg_tim_ctl - watchdog timer control
register (address 35h) bit description .............. 37
Tab. 57. Watchdg_tim_val - watchdog timer value
register (address 36h) bit allocation ................ 37
Tab. 58. Watchdg_tim_val - watchdog timer value
register (address 36h) bit description .............. 38
Tab. 59. Programmable watchdog timer ....................... 38
Tab. 60. Flag location in register Control_2 .................. 39
Tab. 61. Example values in register Control_2 ..............40
Tab. 62. Example to clear only AF (bit 4) ......................40
Tab. 63. Example to clear only MSF (bit 7) ...................40
Tab. 64. Timestp_ctl1/2/3/4 - timestamp control
register (address 14h/1Bh/22h/29h) bit
allocation ......................................................... 41
PCA2131
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 1.0 — 26 July 2021
82 / 86



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