PCF8564A datasheet(39/86 Pages) NXP

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NXP Semiconductors

PCA2131

Nano-power highly accurate RTC with integrated quartz crystal for automotive applications

Writing a logic 1 to WDTF has no effect.

001aag062

watchdog

timer value

WDTF

n = 1

MCU

INT

Counter reached 1, WDTF is logic 1, and an interrupt is generated.

Figure 16. WD_CD set logic 1: watchdog activates an interrupt when timed out

• When the watchdog timer counter reaches 1, the watchdog timer flag WDTF is set logic

• When a minute or second interrupt occurs, the minute/second flag MSF is set logic 1

(see Section 7.13.1).

7.11.4 Pre-defined timers: second and minute interrupt

PCA2131 has two pre-defined timers which are used to generate an interrupt either

once per second or once per minute (see Section 7.13.1). The pulse generator for the

minute or second interrupt operates from an internal 64 Hz clock. It is independent of the

watchdog timer. Each of these timers can be enabled by the bits SI (second interrupt)

and MI (minute interrupt) in register Control_1.

7.11.5 Clearing flags

The flags MSF and AF can be cleared by command. To prevent one flag being

overwritten while clearing another, a logic AND is performed during the write access. A

flag is cleared by writing logic 0 while a flag is not cleared by writing logic 1. Writing logic

1 results in the flag value remaining unchanged.

Two examples are given for clearing the flags. Clearing a flag is made by a write

command:

• Bits labeled with - must be written with their previous values

• Bits labeled with T have to be written with logic 0

• WDTF is read only and has to be written with logic 0

Repeatedly rewriting these bits has no influence on the functional behavior.

Bit

Control_2

MSF

WDTF

Table 60. Flag location in register Control_2

PCA2131

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 1.0 — 26 July 2021

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