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PCF8564A 数据表(PDF) 38 Page - NXP Semiconductors |
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PCF8564A 数据表(HTML) 38 Page - NXP Semiconductors |
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38 / 86 page ![]() NXP Semiconductors PCA2131 Nano-power highly accurate RTC with integrated quartz crystal for automotive applications Bits labeled as X are undefined at power-on and unchanged by subsequent resets. Bit Symbol Value Description 7 to 0 WATCHDG_TIM_ VAL[7:0] 00 to FF timer period in seconds: where n is the timer value (n > 1) Write Only Table 58. Watchdg_tim_val - watchdog timer value register (address 36h) bit description TF[1:0] Timer source clock frequency Units Minimum timer period (n = 2) Units Maximum timer period (n = 255) Units 00 64 Hz 15.625 ms 3.984 s 01 4 Hz 250 ms 63.744 s 10 1⁄4 Hz 4 s 1020 s 11 1⁄64 Hz 64 s 16320 s Table 59. Programmable watchdog timer 7.11.3 Watchdog timer function The watchdog timer interrupt function is enabled or disabled by the WD_CD bit of the register Watchdg_tim_ctl (see Table 56). The 2 bits TF[1:0] in register Watchdg_tim_ctl determine one of the four source clock frequencies for the watchdog timer: 64 Hz, 4 Hz, 1⁄4 Hz or 1⁄64 Hz (see Table 59). When the watchdog timer function is enabled, the 8-bit timer in register Watchdg_tim_val determines the watchdog timer period (see Table 59). The watchdog timer counts down from the software programmed 8-bit binary value n in register Watchdg_tim_val. When the counter reaches 1, the watchdog timer flag WDTF (register Control_2) is set logic 1 and an interrupt is generated. The period accuracy corresponds to n +/- 0.5. The register Watchdg_tim_val is write only and not readable after set. The counter does not automatically reload. When WD_CD is logic 1/0 (watchdog timer interrupt enabled/disabled) and the Micro- controller Unit (MCU) loads a watchdog timer value n: • the flag WDTF is reset • INTA/B is cleared • the watchdog timer starts again Loading the counter with 0 or 1 will: • reset the flag WDTF • clear INTA/B • stop the watchdog timer Remark: WDTF can be cleared by: • loading a value in register Watchdg_tim_val • writing a logic 0 to WDTF PCA2131 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 1.0 — 26 July 2021 38 / 86 |
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