ADIN1110BCPZ-R7 datasheet(27/104 Pages) AD

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Data Sheet

ADIN1110

APPLICATIONS INFORMATION

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Rev. 0 | 27 of 104

The value of the free running counter can be captured using the

input capture signal (TS_CAPT), capturing the value of the counter

in the TS_FREECNT_CAPT register.

Syntonized Counter

The syntonized counter is a 64-bit counter in which the lower 32

bits represent nanoseconds with 1 LSB = 1 ns. When the lower 32

bits reach the value stored in TS_1SEC_CMP, these bits clear and

the upper 32 bits increment representing seconds.

To enable the syntonized counter, the TS_EN bits must be set to 1.

Three modes are supported for capturing time stamps for transmit-

ted and received frames, as follows:

1. Capture a 2-bit sec and a 30-bit ns time stamp as defined in the

OPEN Alliance Specification Section 7.8. See the Configuration

2. Capture a 32-bit sec and a 30-bit ns time stamp as defined in

the OPEN Alliance Specification Section 7.8. See the Configu-

ration Register 0 section.

3. Capture the 32-bit free running counter. See the Timer Configu-

ration Register section.

To enable capturing of time stamps for transmitted and received

frames, set FTSE (CONFIG0 register) to 1.

Waveform Generation on TS_TIMER Output

The ADIN1110 can generate an output signal (TS_TIMER) that

uses two counters to generate repeating waveforms driven by the

syntonized time. These two counters, TS_TIMER_HI and TS_TIM-

ER_LO, specify the high and low period of the TS_TIMER signal

and need to be programmed with multiples of 16 because they are

driven by the syntonized time.

Because it is frequent that the required period of TS_TIMER cannot

be programmed as a multiple of 16, the quantization error correc-

tion register can be programmed with a value between 0 and 15 to

compensate for the TS_TIMER quantization error.

It is possible to specify a time with respect to the 64-bit synton-

ized timer to start the generation of the TS_TIMER output. The

TS_TIMER_START register can be programmed with a value that is

compared with the nanoseconds portion of the syntonized counter

to generate a one-shot start.

The sequence to enable the TS_TIMER output is as follows:

1. If required, change the default value of the TS_TIMER output

from 0 to 1 by writing to the TS_TIMER_DEF bits.

2. Write the values required for the high and low times for the

TS_TIMER output to the TS_TIMER_HI and TS_TIMER_LO

registers.

3. Write the value required for the quantization error correction to

the TS_TIMER_QE_CORR register.

4. Write a start time to the TS_TIMER_START registers. When the

nanoseconds part of the syntonized counter matches this value,

TS_TIMER starts toggling.

The TS_TIMER output can be stopped by writing 1 to the TS_TIM-

ER_STOP bits. When the TS_TIMER output is stopped, the output

goes back to the default value specified in TS_TIMER_DEF.

ELECTROMAGNETIC COMPATIBILITY (EMC)

AND ELECTROMAGNETIC IMMUNITY (EMI)

The ADIN1110 was tested at the system level for EMC and EMI.

Table 17 summarizes the results.

Table 17. EMC/EMI Tests Conducted on ADIN1110 at System Level

EMC/EMI Test

Withstand Threshold

IEC 61000-4-4 Electrical Fast Transient (EFT)

±4 kV

IEC 61000-4-2 ESD (Contact Discharge)

±4 kV

IEC 61000-4-2 ESD (Air Discharge)

±8 kV

IEC 61000-4-5 Surge

±4 kV

IEC 61000-4-6 Conducted Immunity

10 V/m

IEC 61000-4-3 Radiated Immunity

Class A

EN 55032 Radiated Emissions

Class B

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