ADIN1110BCPZ-R7 datasheet(19/104 Pages) AD

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Data Sheet

ADIN1110

BRINGING UP 10BASE-T1L LINKS

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Rev. 0 | 19 of 104

The ADIN1110 can also be configured to advertise a request for 2.4

V p-p transmit level operation (if B10L_TX_LVL_HI_ABLE = 1). This

is set using the 10BASE-T1L high level transmit operating mode

request bit (AN_ADV_B10L_TX_LVL_HI_REQ). 0 = request 1.0 V

p-p transmit level, and 1 = request 2.4 V p-p transmit level.

The link partner advertised transmit level ability can be read in

the link partner 10BASE-T1L high level transmit operating mode

ability register bit (AN_LP_ADV_B10L_TX_LVL_HI_ABL). The link

partner advertised transmit level request can be read in the link

partner 10BASE-T1L high level transmit operating mode request

updated during the autonegotiation process and are valid when the

autonegotiation complete register bit (AN_COMPLETE) is set.

Operation at the 1.0 V p-p transmit level operation occurs if either

the local or remote PHY advertises that it is not capable of transmit-

ting in the high level (2.4 V p-p) transmit operating mode, or if

neither the local nor remote PHY advertises a request for high level

(2.4 V p-p) transmit operating mode.

Operation at the 2.4 V p-p transmit level occurs if both the local

and remote PHY advertises that they are capable of transmitting in

the high level (2.4 V p-p) transmit operating mode, and if either the

local or remote PHY advertises a request for high level (2.4 V p-p)

transmit operating mode.

Therefore, a PHY can ensure it must operate at 1.0 V p-p transmit

level, but it can only request operation at the 2.4 V p-p transmit

level.

Table 15. Determination of Transmit Level by Autonegotiation1

HI_ABL2

HI_REQ

LP_HI_ABL

LP_HI_REQ

Transmit Level

1.0 V p-p

2.4 V p-p

1 X means don't care.

2 HI_ABL, HI_REQ, LP_HI_ABL, and LP_HI_REQ refer to the advertisement bits

AN_LP_ADV_B10L_TX_LVL_HI_ABL, AN_LP_ADV_B10L_TX_LVL_HI_REQ,

AN_ADV_B10L_TX_LVL_HI_ABL, and AN_ADV_B10L_TX_LVL_HI_REQ, re-

spectively.

Advertisement of Master/Slave

The 10BASE-T1L standard uses what is known as a master/slave

clock scheme. This scheme is commonly used in full duplex trans-

ceiver standards using echo cancellation. One PHY is designated

as the master and the other PHY as the slave. Autonegotiation is

used to agree which PHY is the master and which is the slave, and

it generally doesn’t matter which PHY is which.

The ADIN1110 has an internal pull-down resistor on the MS_SEL

pin, which results in a default setting of configuring the PHY to

advertise prefer slave. It is recommended to either use the default

setting of advertise prefer slave or to use a setting of advertise

prefer master.

If it is mandatory for the PHY to operate as master, use an

advertise forced master configuration. However, this configuration

must be used with caution because if remote end is also forced

master, there is a configuration fault, autonegotiation fails, and the

link is not brought up.

The force master/slave configuration register bit

(AN_ADV_FORCE_MS) is used to configure the PHY to advertise

its master/slave configuration as a preference or as a forced value,

as follows: 0 = master/slave configuration is a preferred mode, and

1 = master/slave configuration is a forced mode.

The master/slave configuration register bit (AN_ADV_MST) is used

to configure the PHY to advertise its master/slave configuration, as

follows: 0 = slave and 1 = master.

The link partner advertised master/slave setting can be read

in the link partner force master/slave configuration register bit

(AN_LP_ADV_FORCE_MS) and the link partner master/slave con-

figuration register bit (AN_LP_ADV_MST). These bits are updated

during the autonegotiation process and are valid when the autone-

gotiation complete register bit (AN_COMPLETE) is set.

When the local and remote PHY have the same preferred con-

figuration (for example, both slave or both master), a random

process is used to determine which is the master and which is the

slave. When one PHY has a forced configuration, its master/slave

configuration is given priority over a PHY with a preferred setting

where both PHYs have the same master/slave configuration. If

both PHYs have a forced configuration and the same master/slave

configuration, configuration fault occurs and autonegotiation fails.

The resolution of master/slave can be read using the master/slave

resolution result register bits (AN_MS_CONFIG_RSLTN). This re-

sult indicates if the PHY is configured as a slave or a master or

if there was a configuration fault. These bits are updated during

the autonegotiation process and are valid when the autonegotiation

complete register bit (AN_COMPLETE) is set.

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