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MMPF0200Z 数据表(PDF) 34 Page - NXP Semiconductors

部件名 MMPF0200Z
功能描述  12 Channel Configurable Power Management Integrated Circuit
PDF  118 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

MMPF0200Z 数据表(HTML) 34 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
34
Freescale Semiconductor
PF0200Z
Functional Block Requirements and Behaviors
Power Generation
Figure 9. PF0200Z Typical Power Map
SW2
VDDHIGH
(0.4 to 3.3 V), 1.5 A
VDDARM_IN
VDDSOC_IN
VDDHIGH_IN
VDD_DDR_IO
i.MX6X
MCU
LDO_3p0
SWBST
5.0 V, 0.6 A
SW3B
DDR IO
(0.4 to 3.3 V), 1.25 A
SW3A
DDR CORE
(0.4 to 3.3 V), 1.25 A
SW1B
CORE
(0.3 to 1.875 V), 1.25 A
SW1A
CORE
(0.3 to 1.875 V), 1.25 A
USB_OTG
Peripherals
VGEN1
(0.80 to 1.55 V),
100 mA
VGEN2
(0.80 to 1.55 V),
250 mA
VGEN3
(1.8 to 3.3 V),
100 mA
VSNVS_IN
VGEN4
(1.8 to 3.3 V),
350 mA
VGEN5
(1.8 to 3.3 V),
100 mA
VGEN6
(1.8 to 3.3 V),
200 mA
DDR3
VREFDDR
0.5*VDDR, 10 mA
Coincell
VIN
SW3A/B
VIN
SW2
VINMAX = 3.4 V
VIN
2.8 - 4.5 V
VINMAX = 3.6 V
VSNVS
1.0 to 3.0 V,
400 uA
MUX /
COIN
CHRG
VINMAX = 4.5 V
VIN
SW2
VIN
SW2



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