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MMPF0200Z 数据表(PDF) 99 Page - NXP Semiconductors

部件名 MMPF0200Z
功能描述  12 Channel Configurable Power Management Integrated Circuit
PDF  118 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

MMPF0200Z 数据表(HTML) 99 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
Freescale Semiconductor
99
PF0200Z
Functional Block Requirements and Behaviors
Control Interface I2C Block Description
6B
VSNVSCTL
R/W
8'b0000_0xxx
––
–
–
–
VSNVSVOLT[2:0]
00
0
0
0
0
x
x
6C
VGEN1CTL
R/W
8'b000x_xxxx
–
VGEN1LPWR
VGEN1STBY
VGEN1EN
VGEN1[3:0]
00
0
x
x
x
x
x
6D
VGEN2CTL
R/W
8'b000x_xxxx
–
VGEN2LPWR
VGEN2STBY
VGEN2EN
VGEN2[3:0]
00
0
x
x
x
x
x
6E
VGEN3CTL
R/W
8'b000x_xxxx
–
VGEN3LPWR
VGEN3STBY
VGEN3EN
VGEN3[3:0]
00
0
x
x
x
x
x
6F
VGEN4CTL
R/W
8'b000x_xxxx
–
VGEN4LPWR
VGEN4STBY
VGEN4EN
VGEN4[3:0]
00
0
x
x
x
x
x
70
VGEN5CTL
R/W
8'b000x_xxxx
–
VGEN5LPWR
VGEN5STBY
VGEN5EN
VGEN5[3:0]
00
0
x
x
x
x
x
71
VGEN6CTL
R/W
8'b000x_xxxx
–
VGEN6LPWR
VGEN6STBY
VGEN6EN
VGEN6[3:0]
00
0
x
x
x
x
x
7F
Page Register
R/W
8'b0000_0000
––
–
PAGE[4:0]
00
0
0
0
0
0
0
Table 121. Extended Page 1
Address Register Name TYPE
Default
BITS[7:0]
7
6
5
4
3
2
1
0
80
OTP FUSE READ
EN
R/W
8'b000x_xxx0
––
–
–
–––
OTP FUSE
READ EN
00
0
x
x
x
x0
84
OTP LOAD MASK
R/W
8'b0000_0000
START
RL PWBRTN
FORCE
PWRCTL
RL PWRCTL
RL OTP
RL OTP ECC
RL OTP
FUSE
RL TRIM
FUSE
00
0
0
000
0
8A
OTP ECC SE1
R
8'bxxx0_0000
–
–
–
ECC5_SE
ECC4_SE
ECC3_SE
ECC2_SE
ECC1_SE
x
x
x
0
000
0
8B
OTP ECC SE2
R
8'bxxx0_0000
–
–
–
ECC10_SE
ECC9_SE
ECC8_SE
ECC7_SE
ECC6_SE
x
x
x
0
000
0
8C
OTP ECC DE1
R
8'bxxx0_0000
–
–
–
ECC5_DE
ECC4_DE
ECC3_DE
ECC2_DE
ECC1_DE
x
x
x
0
000
0
8D
OTP ECC DE2
R
8'bxxx0_0000
–
–
–
ECC10_DE
ECC9_DE
ECC8_DE
ECC7_DE
ECC6_DE
x
x
x
0
000
0
Table 120. Functional Page (continued)
BITS[7:0]
Add
Register
Name
R/W
Default
7
6
5
4
3
2
1
0



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