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MMPF0200Z 数据表(PDF) 102 Page - NXP Semiconductors

部件名 MMPF0200Z
功能描述  12 Channel Configurable Power Management Integrated Circuit
PDF  118 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

MMPF0200Z 数据表(HTML) 102 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
102
Freescale Semiconductor
PF0200Z
Functional Block Requirements and Behaviors
Control Interface I2C Block Description
E3
OTP PU CONFIG
XOR
R
8'b000x_xxxx
––
–
PWRON_CFG
_XOR
SWDVS_CLK3_XOR
SEQ_CLK_SPEED_XOR
00
0
x
x
x
x
x
E4(70)
OTP FUSE POR1
R/W
8'b0000_00x0
TBB_POR
SOFT_FUSE
_POR
––
–
–
FUSE_POR1
–
00
0
0
00
x0
E5(70)
OTP FUSE POR1
R/W
8'b0000_00x0
RSVD
RSVD
–
–
–
–
FUSE_POR2
–
00
0
0
00
x0
E6(70)
OTP FUSE POR1
R/W
8'b0000_00x0
RSVD
RSVD
–
–
–
–
FUSE_POR3
–
00
0
0
00
x0
E7
OTP FUSE POR
XOR
R
8'b0000_00x0
RSVD
RSVD
–
–
–
–
FUSE_POR_
XOR
–
00
0
0
00
x0
E8
OTP PWRGD EN
R/W/M 8'b0000_000x
––
–
–
–––
OTP_PG_EN
00
0
0
00
x0
F0
OTP EN ECCO
R/W
8'b000x_xxxx
––
–
EN_ECC_
BANK5
EN_ECC_
BANK4
EN_ECC_
BANK3
EN_ECC_
BANK2
EN_ECC_
BANK1
00
0
x
x
x
x
x
F1
OTP EN ECC1
R/W
8'b000x_xxxx
––
–
EN_ECC_
BANK10
EN_ECC_
BANK9
EN_ECC_
BANK8
EN_ECC_
BANK7
EN_ECC_
BANK6
00
0
x
x
x
x
x
F4
OTP SPARE2_4
R/W
8'b0000_xxxx
––
–
–
RSVD
00
0
0
x
x
x
x
F5
OTP SPARE4_3
R/W
8'b0000_0xxx
––
–
–
–
RSVD
00
0
0
0
x
x
x
F6
OTP SPARE6_2
R/W
8'b0000_00xx
––
–
–
––
RSVD
00
0
0
00
x
x
F7
OTP SPARE7_1
R/W
8'b0000_0xxx
––
–
–
–
–
–
RSVD
00
0
0
0
x
x
x
FE
OTP DONE
R/W
8'b0000_000x
––
–
–
–––
OTP_DONE
00
0
0
000x
FF
OTP I2C ADDR
R/W
8'b0000_0xxx
––
–
–
I2C_SLV
ADDR[3]
I2C_SLV ADDR[2:0]
00
0
0
1
x
x
x
Notes
70.
In PF0200Z It is required to set all of the FUSE_PORx bits to be able to load the fuses.
Table 121. Extended Page 1 (continued)
Address Register Name TYPE
Default
BITS[7:0]
7
6
5
4
3
2
1
0



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