MMPF0200Z datasheet(11/118 Pages) NXP

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Analog Integrated Circuit Device Data



Freescale Semiconductor

PF0200Z

General Product Characteristics

Thermal Characteristics

4.2

Thermal Characteristics

Table 4. Thermal Ratings

Symbol

Description (Rating)

Min.

Max.

Unit

THERMAL RATINGS

Ambient Operating Temperature Range

PF0200Z

-40

C

Operating Junction Temperature Range (6)

-40

125

C

TST

Storage Temperature Range

-65

150

C

TPPRT

Peak Package Reflow Temperature (7)(8)

–

Note 8

C

QFN56 THERMAL RESISTANCE AND PACKAGE DISSIPATION RATINGS

RJA

Junction to Ambient (9)(10)(11)

Natural Convection

Four layer board (2s2p)

Eight layer board (2s6p)

–

°C/W

RJMA

Junction to Ambient (@200 ft/min)(9)(11)

Four layer board (2s2p)

–

°C/W

RJB

Junction to Board(12)

–10

°C/W

RJCBOTTOM

Junction to Case Bottom(13)

–

1.2

°C/W

JT

Junction to Package Top(14)

Natural Convection

–

2.0

°C/W

Notes

Do not operate beyond 125 °C for extended periods of time. Operation above 150 °C may cause permanent damage to the IC. See

Table 5 for thermal protection features.

Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may

cause a malfunction or permanent damage to the device.

Freescale’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow

Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes

and enter the core ID to view all orderable parts (i.e. MC33xxxD enter 33xxx), and review parametrics.

Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)

temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal resistance.

10.

The Board uses the JEDEC specifications for thermal testing (and simulation) JESD51-7 and JESD51-5.

11.

Per JEDEC JESD51-6 with the board horizontal.

12.

Thermal resistance between the die and the printed circuit board per JEDEC JESD51-8. Board temperature is measured on the top

surface of the board near the package.

13.

Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).

14.

Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per

JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written as Psi-JT.

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