MMPF0200Z datasheet(14/118 Pages) NXP

14 / 118 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

PF0200Z

General Product Characteristics

Electrical Characteristics

4.3.2

Current Consumption

Table 7. Current Consumption Summary

TA = -40 to 85 °C, VIN = 3.6 V, VDDIO = 1.7 to 3.6 V, LICELL = 1.8 to 3.3 V, VSNVS = 3.0 V, typical external component values,

unless otherwise noted. Typical values are characterized at VIN = 3.6 V, VDDIO = 3.3 V, LICELL = 3.0 V, VSNVS = 3.0 V and

25 °C, unless otherwise noted.

Mode

PF0200Z Conditions

System Conditions

Typical

MAX

Unit

Coin Cell

(15),(16),(19)

VSNVS from LICELL



All other blocks off

VIN = 0.0 V

VSNVSVOLT[2:0] = 110

No load on VSNVS

4.0

7.0

A

Off (15)(17)

VSNVS from VIN or LICELL



Wake-up from PWRON active



32 k RC on



All other blocks off

VIN

UVDET

No load on VSNVS, PMIC able to wake-up

A

Sleep (18)

VSNVS from VIN



Wake-up from PWRON active



Trimmed reference active



SW3A/B PFM



Trimmed 16 MHz RC off



32 k RC on



VREFDDR disabled

No load on VSNVS. DDR memories in self

refresh

122

220

A

Standby (18)

VSNVS from either VIN or LICELL



SW1A/B combined in PFM



SW2 in PFM



SW3A/B combined in PFM



SWBST off



Trimmed 16 MHz RC enabled



Trimmed reference active



VGEN1-6 enabled



VREFDDR enabled

No load on VSNVS. Processor enabled in

low power mode. All rails powered on

except boost (load = 0 mA)

270

430

A

Notes

15.

At 25 °C only.

16.

Refer to Figure 4 for Coin Cell mode characteristics over temperature.

17.

When VIN is below the UVDET threshold, in the range of 1.8 V

VIN < 2.65 V, the quiescent current increases by 50 A, typically.

18.

For PFM operation, headroom should be 300 mV or greater.

19.

Additional current may be drawn in the coin cell mode when RESETBMCU is pulled up to VSNVS due an internal path from

RESETBMCU to VIN. The additional current is <30

A with a pull up resistor of 100 k. The i.MX 6 processors have an internal pull-up

from the POR_B pin to the VDD_SNVS_IN pin. If additional current in the coin cell mode is not desired for i.MX6 applications, use an

external switch to disconnect the RESETBMCU path when VIN is removed. Pull-up RESETBMCU to a rail that is off in the coin cell

mode, for non-i.MX 6 applications.

MMPF0200Z 数据表(PDF) 14 Page - NXP Semiconductors

MMPF0200Z 数据表(HTML) 14 Page - NXP Semiconductors

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载