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MMPF0200Z 数据表(PDF) 106 Page - NXP Semiconductors

部件名 MMPF0200Z
功能描述  12 Channel Configurable Power Management Integrated Circuit
PDF  118 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

MMPF0200Z 数据表(HTML) 106 Page - NXP Semiconductors

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Analog Integrated Circuit Device Data
106
Freescale Semiconductor
PF0200Z
Typical Applications
Introduction
7
Typical Applications
7.1
Introduction
Figure 24 provides a typical application diagram of the PF0200Z PMIC together with its functional components. For details on
component references and additional components such as filters, refer to the individual sections.
7.1.1
Application Diagram
Figure 24. Typical Application Schematic
VIN
LICELL
SWBSTFB
SWBSTIN
SWBSTLX
O/P
Drive
SWBST
600 mA
Boost
Output Pin
Input Pin
Bi-directional Pin
Package Pin Legend
SCL
SDA
VDDIO
SW3A/B
Single Phase
2500 mA
Buck
VCOREDIG
VCOREREF
GNDREF
100nF
Coin Cell
Battery
1uF
220nF
Vin
2 x 22uF
SWBST
Output
2.2uH
10uF
Vin
To/From
AP
SW1AIN
SW1FB
SW1ALX
SW1BLX
SW1A/B
Single
2500 mA
Buck
SW1VSSSNS
1.0uH
4 x 22uF
SW1AB
output
Vin
4.7uF
VSNVS
0.47uF
Li Cell
Charger
SW2
1500 mA
Buck
VGEN1
100mA
VGEN1
VIN1
2.2uF
VGEN2
250mA
VGEN2
4.7uF
VGEN3
100mA
VGEN3
VIN2
2.2uF
VGEN4
350mA
VGEN4
4.7uF
VGEN5
100mA
VGEN5
VIN3
2.2uF
VGEN6
200mA
VGEN6
2.2uF
Best
of
Supply
OTP
VREFDDR
1uF
VDDOTP
VINREFDDR
VHALF
100nF
100nF
VCORE
PF0200Z
CONTROL
Clocks
32kHz and 16MHz
Initialization State Machine
I2C
Interface
Clocks and
resets
I2C
Register
map
Trim-In-Package
1uF
O/P
Drive
O/P
Drive
Vin
SW1BIN
4.7uF
SW2FB
SW2LX
O/P
Drive
SW2IN
4.7uF
1.0uH
SW2
output
2 x 22uF
Vin
SW2IN
SW3AIN
SW3AFB
SW3ALX
SW3BLX
1.0uH
2 x 22uF
SW3A
output
Vin
4.7uF
O/P
Drive
O/P
Drive
SW3BIN
4.7uF
Vin
SW3B
Output
SW3BFB
2 x 22uF
1.0uH
SW3VSSSNS
Supplies
Control
DVS Control
DVS CONTROL
Reference
Generation
SW3A
Vin
Core Control logic
VIN1
VIN2
VIN3
VDDOTP
SW2
SW2
SW2
1.0uF
1.0uF
1.0uF
GNDREF1
VDDIO
To
MCU
+
-
0.1uF



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