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STM32WLE4JC 数据表(PDF) 118 Page - STMicroelectronics |
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STM32WLE4JC 数据表(HTML) 118 Page - STMicroelectronics |
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118 / 146 page ![]() Electrical characteristics STM32WLE5/E4xx 118/146 DS13105 Rev 9 Figure 22. ADC accuracy characteristics THD Total harmonic distortion VDDA = VREF+ = 3 V, fADC = 35 MHz, fs ≤ 2.5 Msps, TA = 25 °C - -74 -73 dB 2 V < VDDA, VREF+ < 3.6 V, fADC = 35 MHz, fs ≤ 2.5 Msps, TA = entire range --74 -70 1.62 V < VDDA = VREF+ < 3.6 V, TA = entire range Range 1: fADC = 35 MHz, fs ≤ 2.2 Msps Range 2: fADC = 16 MHz, fs ≤ 1.1 Msps --74 -70 1. Based on characterization results, not tested in production. 2. ADC DC accuracy values are measured after internal calibration. 3. Injecting negative current on any analog input pin significantly reduces the accuracy of A-to-D conversion of signal on another analog input. It is recommended to add a Schottky diode (pin to ground) to analog pins susceptible to receive negative current. 4. I/O analog switch voltage booster enabled (BOOSTEN = 1 in the SYSCFG_CFGR1) when VDDA < 2.4 V and disabled when VDDA ≥ 2.4 V. Table 79. ADC accuracy(1)(2)(3) (continued) Symbol Parameter Conditions(4) Min Typ Max Unit MSv19880V6 (1) Example of an actual transfer curve (2) Ideal transfer curve (3) End-point correlation line n = ADC resolution ET = total unadjusted error: maximum deviation between the actual and ideal transfer curves EO = offset error: maximum deviation between the first actual transition and the first ideal one EG = gain error: deviation between the last ideal transition and the last actual one ED = differential linearity error: maximum deviation between actual steps and the ideal one EL = integral linearity error: maximum deviation between any actual transition and the end point correlation line 2 n-1 7 6 5 4 3 2 1 0 Output code EO VSSA 2 n-2 2 n-3 VREF+ (VDDA) ET EL ED 1 LSB ideal EG (1) (2) (3) (or )] [1LSB = VDDA 2 n VREF+ 2 n |
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