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LSM6DSOX 数据表(PDF) 104 Page - STMicroelectronics |
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LSM6DSOX 数据表(HTML) 104 Page - STMicroelectronics |
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104 / 199 page  11.10 SPI2_INT_OIS (6Fh) OIS interrupt configuration register and accelerometer self-test enable setting. The auxiliary SPI interface can write this register when the OIS_CTRL_FROM_UI bit in the FUNC_CFG_ACCESS (01h) register is equal to 0 (SPI2 Full control mode); this register is read-only when the OIS_CTRL_FROM_UI bit is equal to 1 (Primary IF Full control mode) and shows the content of the UI_INT_OIS (6Fh) register. Table 228. SPI_INT_OIS register INT2_ DRDY_OIS LVL2_OIS DEN_LH_OIS - - 0 ST1_XL_OIS ST0_XL_OIS Table 229. SPI_INT_OIS register description INT2_DRDY_OIS Enables OIS chain DRDY on INT2 pin. This setting has priority over all other INT2 settings. LVL2_OIS Enables level-sensitive latched mode on the OIS chain. Default value: 0 DEN_LH_OIS Indicates polarity of DEN signal on OIS chain (0: DEN pin is active-low; 1: DEN pin is active-high) ST[1:0]_XL_OIS Selects accelerometer self-test – effective only if XL OIS chain is enabled. Default value: 00 (00: Normal mode; 01: Positive sign self-test; 10: Negative sign self-test; 11: not allowed) LSM6DSOX SPI2_INT_OIS (6Fh) DS12814 - Rev 3 page 104/199 |
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