MCP2518FD datasheet(34/96 Pages) MICROCHIP

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MCP2518FD

DS20006027A-page 34

 2019 Microchip Technology Inc.

bit 7

Unimplemented: Read as ‘0’

bit 6-0

ICODE[6:0]: Interrupt Flag Code bits( 1)

1001011-1111111 = Reserved

1001010 = Transmit Attempt Interrupt (any bit in CiTXATIF set)

1001001 = Transmit Event FIFO Interrupt (any bit in CiTEFIF set)

1001000 = Invalid Message Occurred (IVMIF/IE)

1000111 = Operation Mode Change Occurred (MODIF/IE)

1000110 = TBC Overflow (TBCIF/IE)

1000101 = RX/TX MAB Overflow/Underflow (RX: message received before previous message was

saved to memory; TX: can't feed TX MAB fast enough to transmit consistent data.)

(SERRIF/IE)

1000100 = Address Error Interrupt (illegal FIFO address presented to system) (SERRIF/IE)

1000011 = Receive FIFO Overflow Interrupt (any bit in CiRXOVIF set)

1000010 = Wake-up interrupt (WAKIF/WAKIE)

1000001 = Error Interrupt (CERRIF/IE)

1000000 = No interrupt

0100000-0111111 = Reserved

0011111 = FIFO 31 Interrupt (TFIF<31> or RFIF<31> set)

...

0000001 = FIFO 1 Interrupt (TFIF<1> or RFIF<1> set)

0000000 = TXQ Interrupt (TFIF<0> set)

CiVEC – INTERRUPT CODE REGISTER (CONTINUED)

Note 1:

If multiple interrupts are pending, the interrupt with the highest number will be indicated.

MCP2518FD 数据表(PDF) 34 Page - Microchip Technology