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MCP2518FD 数据表(PDF) 67 Page - Microchip Technology |
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MCP2518FD 数据表(HTML) 67 Page - Microchip Technology |
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67 / 96 page ![]() 2019 Microchip Technology Inc. DS20000000A-page 67 MCP2518FD 4.0 SPI INTERFACE The MCP2518FD device is designed to interface directly with a Serial Peripheral Interface port available on most microcontrollers. The SPI in the microcontroller must be configured in mode 0,0 or 1,1 in 8-bit operating mode. SFR and Message Memory (RAM) are accessed using SPI instructions. Figure 4-1 illustrates the generic format of the SPI instructions (SPI mode 0,0). Each instruction starts with driving nCS low (falling edge on nCS). The 4-bit command and the 12-bit address are shifted into SDI on the rising edge of SCK. During a write instruction, data bits are shifted into SDI on the rising edge of SCK. During a read instruction, data bits are shifted out of SDO on the falling edge of SCK. One or more data bytes are transfered with one instruction. Data bits are updated on the falling edge of SCK and must be valid on the rising edge of SCK. Each instruction ends with driving nCS high (rising edge on nCS). Refer to Figure 7-1 for detailed input and output timing for both mode 0,0 and mode 1,1. Table 4-1 lists the SPI instructions and their format. FIGURE 4-1: SPI INSTRUCTION FORMAT Note 1: The frequency of SCK has to be less than or equal to half the frequency of SYSCLK. This ensures that the synchronization between SCK and SYSCLK works correctly. 2: In order to minimize the Sleep current, the SDO pin of the MCP2518FD device must not be left floating while the device is in Sleep mode. This can be achieved by enabling a pull-up or pull-down resistor inside the MCU on the pin that is connected to the SDO pin, while the MCP2518FD device is in Sleep mode. TABLE 4-1: SPI INSTRUCTIONS Name Format Description RESET C = 0b0000; A = 0x000 Resets internal registers to default state; selects Configuration mode. READ C = 0b0011; A; D = SDO Read SFR/RAM from address A. WRITE C = 0b0010; A; D = SDI Write SFR/RAM to address A. READ_CRC C = 0b1011; A; N; D = SDO; CRC = SDO Read SFR/RAM from address A. N data bytes. Two bytes CRC. CRC is calculated on C, A, N and D. WRITE_CRC C = 0b1010; A; N; D = SDI; CRC = SDI Write SFR/RAM to address A. N data bytes. Two bytes CRC. CRC is calculated on C, A, N and D. WRITE_SAFE C = 0b1100; A; D = SDI; CRC = SDI Write SFR/RAM to address A. Check CRC before write. CRC is calcu- lated on C, A and D. Legend: C = Command (4 bit), A = Address (12 bit), D = Data (1 to n bytes), N = Number of Bytes (1 byte), CRC (2 bytes) 123 4 567 8 910 11 12 13 14 10 15 16 17 18 19 20 21 22 23 nCS SCK SDI SDO C<3> C<2> C<1> C<0> A<11> A<10> A<9> A<8> A<7> A<6> A<5> A<4> A<3> A<2> A<1> A<0> 24 D<7> D<6> D<5> D<4> D<3> D<2> D<1> D<0> D<7> D<6> D<5> D<4> D<3> D<2> D<1> D<0> Sample Update Sample Sample Update |
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