MCP2518FD datasheet(55/96 Pages) MICROCHIP

55 / 96 page

 2019 Microchip Technology Inc.

DS20006027A-page 55

MCP2518FD

bit 1

TFHRFHIE: Transmit/Receive FIFO Half Empty/Half Full Interrupt Enable bit

TXEN = 1 (FIFO configured as a Transmit FIFO)

Transmit FIFO Half Empty Interrupt Enable

1 = Interrupt enabled for FIFO half empty

0 = Interrupt disabled for FIFO half empty

TXEN = 0 (FIFO configured as a Receive FIFO)

Receive FIFO Half Full Interrupt Enable

1 = Interrupt enabled for FIFO half full

0 = Interrupt disabled for FIFO half full

bit 0

TFNRFNIE: Transmit/Receive FIFO Not Full/Not Empty Interrupt Enable bit

TXEN = 1 (FIFO configured as a Transmit FIFO)

Transmit FIFO Not Full Interrupt Enable

1 = Interrupt enabled for FIFO not full

0 = Interrupt disabled for FIFO not full

TXEN = 0 (FIFO configured as a Receive FIFO)

Receive FIFO Not Empty Interrupt Enable

1 = Interrupt enabled for FIFO not empty

0 = Interrupt disabled for FIFO not empty

CiFIFOCONm – FIFO CONTROL REGISTER m, (m = 1 TO 31) (CONTINUED)

Note 1:

These bits can only be modified in Configuration mode.

This bit is updated when a message completes (or aborts) or when the FIFO is reset.

FRESET is set while in Configuration mode and is automatically cleared in Normal mode.

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