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MCP2518FD 数据表(PDF) 16 Page - Microchip Technology

部件名 MCP2518FD
功能描述  External CAN FD Controller with SPI Interface
PDF  96 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

MCP2518FD 数据表(HTML) 16 Page - Microchip Technology

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MCP2518FD
DS20006027A-page 16
 2019 Microchip Technology Inc.
REGISTER 3-1:
OSC –
MCP2518FD OSCILLATOR CONTROL REGISTER
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 31
bit 24
U-0
U-0
U-0
U-0
U-0
U-0
U-0
U-0
—
—
—
—
—
—
—
—
bit 23
bit 16
U-0
U-0
U-0
R-0
U-0
R-0
U-0
R-0
—
—
—
SCLKRDY
—OSCRDY
—
PLLRDY
bit 15
bit 8
U-0
R/W-1
R/W-1
R/W-0
R/W-0
HS/C-0
U-0
R/W-0
—
CLKODIV<1:0>
SCLKDIV( 1)
LPMEN( 3)
OSCDIS( 2)
—PLLEN( 1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 31-13
Unimplemented: Read as ‘0’
bit 12
SCLKRDY: Synchronized SCLKDIV bit
1 = SCLKDIV 1
0 = SCLKDIV 0
bit 11
Unimplemented: Read as ‘0’
bit 10
OSCRDY: Clock Ready
1 = Clock is running and stable
0 = Clock not ready or off
bit 9
Unimplemented: Read as ‘0’
bit 8
PLLRDY: PLL Ready
1 = PLL Locked
0 = PLL not ready
bit 7
Unimplemented: Read as ‘0’
bit 6-5
CLKODIV<1:0>: Clock Output Divisor
11 =CLKO is divided by 10
10 =CLKO is divided by 4
01 =CLKO is divided by 2
00 =CLKO is divided by 1
bit 4
SCLKDIV: System Clock Divisor( 1)
1 = SCLK is divided by 2
0 = SCLK is divided by 1
Note 1:
This bit can only be modified in Configuration mode.
2:
Clearing OSCDIS while in Sleep mode will wake-up the device and put it back in Configuration mode.
3:
Setting LPMEN doesn’t actually put the device in LPM. It selects which Sleep mode will be entered after
requesting Sleep mode using CiCON.REQOP. In order to wake up on RXCAN activity, CiINT.WAKIE must
be set.



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