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R5F104FCAFP 数据表(PDF) 141 Page - Renesas Technology Corp

部件名 R5F104FCAFP
功能描述  True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz
PDF  207 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F104FCAFP 数据表(HTML) 141 Page - Renesas Technology Corp

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RL78/G13
3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA = –40 to +105°C)
R01DS0131EJ0350 Rev.3.50
141 of 200
Jun 30, 2020
3.5 Peripheral Functions Characteristics
AC Timing Test Points
VIH/VOH
VIL/VOL
Test points
VIH/VOH
VIL/VOL
3.5.1 Serial array unit
(1) During communication at same potential (UART mode)
(TA = –40 to +105°C, 2.4 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Parameter
Symbol
Conditions
HS (high-speed main) Mode
Unit
MIN.
MAX.
Transfer rate Note 1
fMCK/12 Note 2
bps
Theoretical value of the
maximum transfer rate
fCLK = 32 MHz, fMCK = fCLK
2.6
Mbps
Notes 1. Transfer rate in the SNOOZE mode is 4800 bps only.
2. The following conditions are required for low voltage interface when EVDD0 < VDD.
2.4 V
≤ EVDD0 < 2.7 V : MAX. 1.3 Mbps
Caution
Select the normal input buffer for the RxDq pin and the normal output mode for the TxDq pin by using
port input mode register g (PIMg) and port output mode register g (POMg).
UART mode connection diagram (during communication at same potential)
RL78 microcontroller
TxDq
RxDq
Rx
Tx
User device
UART mode bit width (during communication at same potential) (reference)
Baud rate error tolerance
High-/Low-bit width
1/Transfer rate
TxDq
RxDq
Remarks 1.
q: UART number (q = 0 to 3), g: PIM and POM number (g = 0, 1, 8, 14)
2.
fMCK: Serial array unit operation clock frequency
(Operation clock to be set by the CKSmn bit of serial mode register mn (SMRmn). m: Unit number,
n: Channel number (mn = 00 to 03, 10 to 13))



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