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R5F104FCAFP 数据表(PDF) 152 Page - Renesas Technology Corp

部件名 R5F104FCAFP
功能描述  True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz
PDF  207 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F104FCAFP 数据表(HTML) 152 Page - Renesas Technology Corp

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RL78/G13
3. ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS TA = –40 to +105°C)
R01DS0131EJ0350 Rev.3.50
152 of 200
Jun 30, 2020
(6) Communication at different potential (1.8 V, 2.5 V, 3 V) (CSI mode) (master mode, SCKp... internal clock
output) (2/3)
(TA = –40 to +105°C, 2.4 V
≤ EVDD0 = EVDD1 ≤ VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)
Parameter
Symbol
Conditions
HS (high-speed main) Mode
Unit
MIN.
MAX.
SIp setup time
(to SCKp
↑) Note
tSIK1
4.0 V
≤ EVDD0 ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
Cb = 30 pF, Rb = 1.4 k
Ω
162
ns
2.7 V
≤ EVDD0 < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
Cb = 30 pF, Rb = 2.7 k
Ω
354
ns
2.4 V
≤ EVDD0 < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
Cb = 30 pF, Rb = 5.5 k
Ω
958
ns
SIp hold time
(from SCKp
↑) Note
tKSI1
4.0 V
≤ EVDD0 ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
Cb = 30 pF, Rb = 1.4 k
Ω
38
ns
2.7 V
≤ EVDD0 < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
Cb = 30 pF, Rb = 2.7 k
Ω
38
ns
2.4 V
≤ EVDD0 < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
Cb = 30 pF, Rb = 2.7 k
Ω
38
ns
Delay time from SCKp
↓ to
SOp output Note
tKSO1
4.0 V
≤ EVDD0 ≤ 5.5 V, 2.7 V ≤ Vb ≤ 4.0 V,
Cb = 30 pF, Rb = 1.4 k
Ω
200
ns
2.7 V
≤ EVDD0 < 4.0 V, 2.3 V ≤ Vb ≤ 2.7 V,
Cb = 30 pF, Rb = 2.7 k
Ω
390
ns
2.4 V
≤ EVDD0 < 3.3 V, 1.6 V ≤ Vb ≤ 2.0 V,
Cb = 30 pF, Rb = 5.5 k
Ω
966
ns
Note
When DAPmn = 0 and CKPmn = 0, or DAPmn = 1 and CKPmn = 1.
Caution
Select the TTL input buffer for the SIp pin and the N-ch open drain output (VDD tolerance (for the 20- to
52-pin products)/EVDD tolerance (for the 64- to 100-pin products)) mode for the SOp pin and SCKp pin
by using port input mode register g (PIMg) and port output mode register g (POMg). For VIH and VIL, see
the DC characteristics with TTL input buffer selected.
(Remarks are listed on the page after the next page.)



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