P9222-R/RN Datasheet

© 2019-2022 Renesas Electronics Corporation

50

May 5, 2022

Table 34. Foreign Object Detection Registers, FOD (0x70-0x7E)[a]

The FOD registers are divided into eight pairs. Each pair has one byte for gain setting and one byte for offset setting. The first six pairs control

the Received Power calculation for six power sectors during the Power Transfer phase. The seventh pair calibrates the internal DC Load. The

set values of the FOD registers are found with the help of a Renesas developed calibration procedure using the nok9 tester.

The firmware initializes the FOD registers for BPP mode. The correct set is loaded at completion of the ID and Configuration Phase. The AP

can modify the registers at any time if needed to update the values.

Address

and Bit

Register Field Name

R/W

Default

Value

Function and Description

0x70 [7:0]

GAIN_0

R/W

0xBC

FOD coefficients for Power Region 0: Gain (slope settings).

0x71 [7:0]

OFFSET_0

R/W

0x14

FOD coefficients for Power Region 0: Offset settings.

0x72 [7:0]

GAIN_1

R/W

0x98

FOD coefficients for Power Region 1: Gain (slope settings).

0x73 [7:0]

OFFSET_1

R/W

0x18

FOD coefficients for Power Region 1: Offset settings.

0x74 [7:0]

GAIN_2

R/W

0x9F

FOD coefficients for Power Region 2: Gain (slope settings).

0x75 [7:0]

OFFSET_2

R/W

0x0A

FOD coefficients for Power Region 2: Offset settings.

0x76 [7:0]

GAIN_3

R/W

0x94

FOD coefficients for Power Region 3: Gain (slope settings).

0x77 [7:0]

OFFSET_3

R/W

0x12

FOD coefficients for Power Region 3: Offset settings.

0x78 [7:0]

GAIN_4

R/W

0x97

FOD coefficients for Power Region 4: Gain (slope settings).

0x79 [7:0]

OFFSET_4

R/W

0x05

FOD coefficients for Power Region 4: Offset settings.

0x7A [7:0]

GAIN_5

R/W

0xA7

FOD coefficients for Power Region 5: Gain (slope settings).

0x7B [7:0]

OFFSET_5

R/W

0xCB

FOD coefficients for Power Region 5: Offset settings.

0x7C [7:0]

GAIN_6

R/W

0x14

FOD coefficients for Power Region 6: Gain (slope settings).

0x7D [7:0]

OFFSET_6

R/W

0x00

FOD coefficients for Power Region 6: Offset settings.

0x7E [7:0]

GAIN_7

R/W

0x01

FOD coefficients for Power Region 7: Gain (slope settings).

0x7F[ 7:0]

OFFSET_7

R/W

0x50

FOD coefficients for Power Region 7: Offset settings.

[a] These default FOD coefficients are calculated to PASS Nok9 CATS1 tester FOD tests using the P9222-R/RN reference design. FOD coefficients

must be changed if the receiver design uses a different coil compared to the P9222-R/RN reference design, or if there is a large amount of

friendly metal around the receiver coil.

Table 35. ADC Result Register (0xD4, 16-bit, OD2 in Default Config)

Address and

Bit

Register Field Name R/W

Default

Value

Function and Description

0xD4 [15:0]

AdcResult[0]

R

0

Configurable for GPIO, Temperature, Vout, Iout, or Vrect. By default it is configured

to OD2. The value is always in ADC counts and therefore must be converted to the

desired units.

For GPIOs the conversion is:

AdcResult[0] * 2100 / 4096 = Voltage on OD2 in mV