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P9222-R 数据表(PDF) 26 Page - Renesas Technology Corp |
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P9222-R 数据表(HTML) 26 Page - Renesas Technology Corp |
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26 / 58 page ![]() P9222-R/RN Datasheet © 2019-2022 Renesas Electronics Corporation 26 May 5, 2022 Figure 20. State Diagram for Reading User Data Received from the P9235-RB If the receiver is sending 1 byte, 2 bytes, and 3 bytes in the outgoing register, then we would set the header register to 0x18, 0x28, and 0x38 respectively. Did the INT pin transition from HIGH to LOW and bit 5 of register 0x36 set to 1? Yes Read the incoming Header register (0x57) and User Data registers (0x58 to 0x5F) Set bit 5 of register 0x3A to 1 to clear the received interrupt and data received flag Set bit 5 of register 0x4E to 1 to clear the interrupt events and reset the INT pin |
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