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P9222-R 数据表(PDF) 18 Page - Renesas Technology Corp

部件名 P9222-R
功能描述  Wireless Power Receiver for Low Power Applications
PDF  58 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

P9222-R 数据表(HTML) 18 Page - Renesas Technology Corp

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P9222-R/RN Datasheet
© 2019-2022 Renesas Electronics Corporation
18
May 5, 2022
5. Theory of Operation
The P9222-R/RN is a highly-integrated wireless power receiver for mobile or stationary devices. The device can receive and provide up to 5W
to its output when powered wirelessly using near-field magnetic induction. The device is optimized for efficient power transfer in low-power
wearable applications.
5.1 Overview
The simplified internal block diagram of the P9222-R/RN is shown in Figure 2. Energy is transferred wirelessly from the transmitter to the P9222-
R/RN via an external Rx coil and CS capacitor(s). The external LC is connected to the AC1 and AC2 pins to be full-wave-rectified (AC-to-DC).
5.1.1 Low-Power Ping Detection
Once charging has completed, the wireless power connection to the Tx can be programmed to terminate to save power. In order to inform the
system that the P9222-R/RN is still on the charger, the PDETB pin will be held LOW as long as Tx ping pulses are detected. The resistor and
capacitor (RC) connected to the PDET_RC pin should be selected such that the time constant of the RC maintains an adequate charge between
Tx ping events to prevent PDETB from changing states until the device is removed from the Tx. The values of the RC circuit should be selected
based on the expected ping time interval of the Tx. For more information, see “Low-Power Ping Detection Operation”.
5.1.2 Rx Operation
The wireless power is stored on a capacitor(s) connected to the VRECT pin in Rx mode. Until the voltage across the VRECT capacitor exceeds
the under-voltage lock-out (UVLO) threshold, the rectification is performed by the body diodes of the synchronous full bridge rectifier FETs.
After the internal biasing circuit is enabled, the driver and control blocks operate the MOSFET switches of the rectifier in various modes to
maintain reliable connections and optimal efficiency. An internal ADC monitors the voltage at VRECT and the load current. The P9222-R/RN
sends instructions to the wireless power transmitter to increase or decrease the amount of power transferred or to terminate power transmission
based on these readings. The LDO VOUT pin can be pre-programmed from 3.5V up to 12V or changed after startup using I2C commands. The
headroom and target VRECT value will automatically adjust based on the latest VOUT set-point programmed value. The internal temperature
is continuously monitored to ensure proper operation.
5.2 Wireless Power Control
The voltage at VRECT and the current through the rectifier are sampled periodically and digitized by the ADC. The digital equivalents of the
voltage and current are supplied to the internal control logic, which decides whether the loading conditions on VRECT indicate that a change in
the operating point is required. If the load is heavy enough to bring the voltage at VRECT below its target, the transmitter is instructed to move
its frequency lower, closer to resonance. If the voltage at VRECT is higher than its target, the transmitter is instructed to increase its frequency.
To maximize efficiency, the voltage at VRECT is programmed to decrease as the LDO’s load current increases.
5.3 Startup
When a mobile device containing the P9222-R/RN is placed on a WPC “Qi” charging pad, it responds to the transmitter’s “ping” signal by
rectifying the AC power from the transmitter and storing it on a capacitor connected to VRECT. During the “ping” phase, once the rectifier
provides a voltage at the VRECT pin above the UVLO threshold, the digital section of the P9222-R/RN enables communication. The control
loop of the P9222-R/RN adjusts the rectifier voltage by sending Control Error Packets (CEPs) to the transmitter before and after it enables the
VOUT LDO.
The VOUT LDO is enabled when the power transfer phase is initiated and the voltage at VRECT (i.e., the output of the full-wave synchronous
rectifier reaches the target voltage that includes headroom in addition to the LDO VOUT target voltage). For example, if the VOUT voltage
target is 5V, the target VRECT voltage is VOUT plus headroom. If the VRECT target voltage is not reached within 1 second after entering the
power transfer phase, the VOUT LDO will be enabled automatically.



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