P9222-R/RN Datasheet

© 2019-2022 Renesas Electronics Corporation

6

May 5, 2022

Table 7. Registers Used for Reading User Data from the P9235-RB..............................................................................................................25

Table 8. Recommended Coil Manufacturer.....................................................................................................................................................31

Table 9. Recommended RC Values for PDET_RC Components Based on Capacitance and Ping Interval...................................................35

Table 10. Recommended Maximum Estimated Power Loss.............................................................................................................................39

Table 11. Chip Part Number ID Register, Chip_ID_L (0x00), Chip_ID_H (0x01)..............................................................................................42

Table 12. Chip Revision Register, Chip_Rev (0x02).........................................................................................................................................42

Table 13. Status Registers, Status_L (0x34), Status_H (0x35).........................................................................................................................43

Table 14. Interrupt Registers, INT_L (0x36), INT_H (0x37)[a]............................................................................................................................43

Table 15. Interrupt Enable Registers, INT_Enable_L (0x38), INT_Enable_H (0x39)........................................................................................44

Table 16. Interrupt Clear Registers, INT_Clear_L (0x3A), INT_Clear_H (0x3B)...............................................................................................44

Table 17. Vout Set Register, Vout_Set (0x3C)..................................................................................................................................................45

Table 18. ILIM Set Register, ILIM_Set (0x3D)...................................................................................................................................................45

Table 19. Battery Charge Status Register, CHG_Status (0x3E)[a].....................................................................................................................45

Table 20. End of Power Transfer Register, EPT (0x3F)[a] .................................................................................................................................46

Table 21. Vrect ADC Value Registers, ADC_Vrect_L (0x40), ADC_Vrect_H (0x41) ........................................................................................46

Table 22. Vout ADC Value Registers, ADC_Vout_L (0x42), ADC_Vout_H (0x43) ...........................................................................................46

Table 23. Iout Value Registers, Iout_L (0x44), Iout_H (0x45) ...........................................................................................................................46

Table 24. Operating Frequency Registers, Op_Freq_L (0x48), Op_Freq_H (0x49) (RX Only).........................................................................46

Table 25. System Operating Mode Register, Sys_Op_Mode (0x4C)................................................................................................................47

Table 26. (AP to P9222-R/RN) Command Register, COM (0x4E) ....................................................................................................................47

Table 27. Outgoing Packet Header Register (0x50, 8-bit).................................................................................................................................48

Table 28. Outgoing Packet Data Registers (0x51-0x57, 8-bit) ..........................................................................................................................48

Table 29. Incoming Packet Header Register (0x50, 8-bit).................................................................................................................................48

Table 30. Incoming Packet Data Registers (0x59-0x5F, 8-bit)..........................................................................................................................48

Table 31. Die Temperature ADC Value Registers, ADC_Die_Temp_L (0x66), ADC_Die_Temp_H (0x67)......................................................49

Table 32. Overvoltage Protection Set Register (0xB3, 8-bit).............................................................................................................................49

Table 33. ASK Modulation Depth Register (0xB2, 16-bit) .................................................................................................................................49

Table 34. Foreign Object Detection Registers, FOD (0x70-0x7E)[a]..................................................................................................................50

Table 35. ADC Result Register (0xD4, 16-bit, OD2 in Default Config)..............................................................................................................50

Table 36. ADC Result Register (0xD6, 16-bit, GP1 in Default Config)..............................................................................................................51

Table 37. ADC Result Register (0xD8, 16-bit, GP2 in Default Config)..............................................................................................................51

Table 38. ADC Result Register (0xDA, 16-bit, Die Temperature in Default Config)..........................................................................................51

Table 39. External Thermistor Voltage on GP0 (0xB0, 16-bit) ..........................................................................................................................51

Table 40. VRECT Target Register (0x90, 16-bit) ..............................................................................................................................................51

Table 41. VRECT Knee Register (0x92, 8-bit) ..................................................................................................................................................52

Table 42. VRECT Correction Factor Register (0x93, 8-bit) ...............................................................................................................................52

Table 43. VRECT Maximum Correction Register (0x94, 16-bit)........................................................................................................................52

Table 44. VRECT Minimum Correction Register (0x96, 16-bit).........................................................................................................................52