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ADE7169ASTF16 数据表(PDF) 115 Page - Analog Devices |
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ADE7169ASTF16 数据表(HTML) 115 Page - Analog Devices |
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115 / 140 page  Preliminary Technical Data ADE7169F16 Rev. PrD | Page 115 of 140 (TIMECON, 0xA1) to ensure that the RTC is stopped before writing the counter registers. Then the RTC should be started again by setting the RTCEN bit. Note that it takes up to two 32 kHz clock periods to update the RTC counter SFRs. This can be accomplished using the following 8052 assembly code where the current time is held in R0 through R3. SetupRTC: MOV TIMECON,#040h ; stop the RTC ; wait at least one 32 kHz clock period (30.5us) MOV TCON, #03h ; TL0 is an 8-bit timer MOV TL0,#00h ; waits 62.5us at 4.096MHz CLR TF0 ; clear overflow flag SETB TR0 ; start Timer0 Timeout: JNZ TF0, Timeout MOV HTHSEC, R0 ; using Bank 0 MOV SEC, R1 MOV MIN, R2 MOV HOUR, R3 MOV TIMECON, #041h ; start the RTC |
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