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AT89C51CC02CA-RATUM 数据表(PDF) 68 Page - ATMEL Corporation |
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AT89C51CC02CA-RATUM 数据表(HTML) 68 Page - ATMEL Corporation |
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68 / 156 page ![]() 68 AT/T89C51CC02 4126J–CAN–05/06 Table 47. TL2 Register TL2 (S:CCh) Timer 2 Low Byte Register Reset Value = 0000 0000b Not bit addressable Table 48. RCAP2H Register RCAP2H (S:CBh) Timer 2 Reload/Capture High Byte Register Reset Value = 0000 0000b Not bit addressable Table 49. RCAP2L Register RCAP2L (S:CAh) Timer 2 Reload/Capture Low Byte Register Reset Value = 0000 0000b Not bit addressable 76 54 32 1 0 -- --- -- - Bit Number Bit Mnemonic Description 7 - 0 Low Byte of Timer 2 76 54 32 1 0 -- --- -- - Bit Number Bit Mnemonic Description 7 - 0 High Byte of Timer 2 Reload/Capture. 76 54 32 1 0 -- --- -- - Bit Number Bit Mnemonic Description 7 - 0 Low Byte of Timer 2 Reload/Capture. |
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