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AT89C51CC02CA-RATUM 数据表(PDF) 20 Page - ATMEL Corporation |
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AT89C51CC02CA-RATUM 数据表(HTML) 20 Page - ATMEL Corporation |
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20 / 156 page ![]() 20 AT/T89C51CC02 4126J–CAN–05/06 Power Management Two power reduction modes are implemented in the A/T89C51CC02: the Idle mode and the Power-down mode. These modes are detailed in the following sections. In addition to these power reduction modes, the clocks of the core and peripherals can be dynami- cally divided by 2 using the X2 Mode detailed in Section “Clock”. Reset Pin In order to start-up (cold reset) or to restart (warm reset) properly the microcontroller, a high level has to be applied on the RST pin. A bad level leads to a wrong initialisation of the internal registers like SFRs, PC, etc. and to unpredictable behavior of the microcon- troller. A warm reset can be applied either directly on the RST pin or indirectly by an internal reset source such as a watchdog, PCA, timer, etc. At Power-up (cold reset) Two conditions are required before enabling a CPU start-up: • VDD must reach the specified VDD range, • The level on xtal1 input must be outside the specification (VIH, VIL). If one of these two conditions are not met, the microcontroller does not start correctly and can execute an instruction fetch from anywhere in the program space. An active level applied on the RST pin must be maintained until both of the above conditions are met. A reset is active when the level VIH1 is reached and when the pulse width covers the period of time where VDD and the oscillator are not stabilized. Two parameters have to be taken into account to determine the reset pulse width: • VDD rise time (vddrst), • Oscillator startup time (oscrst). To determine the capacitor the highest value of these two parameters has to be chosen. The reset circuitry is shown in Figure 5. Figure 5. Reset Circuitry Table 13 and Table 14 give some typical examples for three values of VDD rise times, two values of oscillator start-up time and two pull-down resistor values. Table 13. Minimum Reset Capacitor for a 50K Pull-down Resistor oscrst/vddrst 1ms 10ms 100ms 5ms 820nF 1.2µF 12µF 20ms 2.7µF 3.9µF 12µF 0 VDD Rrst Crst RST pin Internal reset Reset input circuitry |
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