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AT89C51CC02CA-RATUM 数据表(PDF) 39 Page - ATMEL Corporation |
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AT89C51CC02CA-RATUM 数据表(HTML) 39 Page - ATMEL Corporation |
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39 / 156 page  39 AT/T89C51CC02 4126J–CAN–05/06 Figure 15. Flash and Extra row Programming Procedure Hardware Security Byte The following procedure is used to program the Hardware Security Byte space and is summarized in Figure 16: • Set FPS and map Hardware byte (FCON = 0x0C) • Save then disable the interrupts. • Load DPTR at address 0000h. • Load Accumulator register with the data to load. • Execute the MOVX @DPTR, A instruction. • Launch the programming by writing the data sequence 54h followed by A4h in FCON register. This step of the procedure must be executed from FM1. The end of the programming indicated by the FBusy flag cleared. • Restore the interrupts Flash Spaces Programming Save & Disable IT EA = 0 Launch Programming FCON = 5xh FCON = Axh End Programming Restore IT Column Latches Loading See Figure 14 FBusy Cleared? Clear Mode FCON = 00h |
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