AT89C51CC02CA-RATUM datasheet(23/156 Pages) ATMEL

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AT/T89C51CC02

4126J–CAN–05/06

Exiting Power-down Mode

Note:

VDD was reduced during the Power-down mode, do not exit Power-down mode until

VDD is restored to the normal operating level.

There are two ways to exit the Power-down mode:

Generate an enabled external interrupt.

–

The A/T89C51CC02 provides capability to exit from Power-down using

INT0#, INT1#.

Hardware clears PD bit in PCON register which starts the oscillator and

restores the clocks to the CPU and peripherals. Using INTx# input,

execution resumes when the input is released (See Figure 8). Execution

resumes with the interrupt service routine. Upon completion of the interrupt

service routine, program execution resumes with the instruction immediately

following the instruction that activated Power-down mode.

Notes:

1. The external interrupt used to exit Power-down mode must be configured as level

sensitive (INT0# and INT1#) and must be assigned the highest priority. In addition,

the duration of the interrupt must be long enough to allow the oscillator to stabilize.

The execution will only resume when the interrupt is deasserted.

2. Exit from power-down by external interrupt does not affect the SFRs nor the internal

RAM content.

Figure 8. Power-down Exit Waveform Using INT1:0#

Generate a reset.

–

A logic high on the RST pin clears PD bit in PCON register directly and

asynchronously. This starts the oscillator and restores the clock to the CPU

and peripherals. Program execution momentarily resumes with the

instruction immediately following the instruction that activated Power-down

mode and may continue for a number of clock cycles before the internal

reset algorithm takes control. Reset initializes the A/T89C51CC02 and

vectors the CPU to address 0000h.

Notes:

1. During the time that execution resumes, the internal RAM cannot be accessed; how-

ever, it is possible for the Port pins to be accessed. To avoid unexpected outputs at

the Port pins, the instruction immediately following the instruction that activated the

Power-down mode should not write to a Port pin or to the external RAM.

2. Exit from power-down by reset redefines all the SFRs, but does not affect the internal

RAM content.

INT1:0#

OSC

Power-down phase

Oscillator restart phase

Active phase

AT89C51CC02CA-RATUM 数据表(PDF) 23 Page - ATMEL Corporation

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