AT89C51CC02CA-RATUM datasheet(31/156 Pages) ATMEL

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AT/T89C51CC02

4126J–CAN–05/06

EEPROM Data

Memory

The 2K bytes on-chip EEPROM memory block is located at addresses 0000h to 07FFh

of the XRAM/XRAM memory space and is selected by setting control bits in the EECON

A physical write in the EEPROM memory is done in two steps: write data in the column

latches and transfer of all data latches into an EEPROM memory row (programming).

The number of data written on the page may vary from 1 up to 128 Bytes (the page

size). When programming, only the data written in the column latch is programmed and

a ninth bit is used to obtain this feature. This provides the capability to program the

whole memory by Bytes, by page or by a number of Bytes in a page. Indeed, each ninth

bit is set when the writing the corresponding byte in a row and all these ninth bits are

reset after the writing of the complete EEPROM row.

Write Data in the Column

Latches

Data is written by byte to the column latches as for an external RAM memory. Out of the

11 address bits of the data pointer, the 4 MSBs are used for page selection (row) and 7

are used for byte selection. Between two EEPROM programming sessions, all the

addresses in the column latches must stay on the same page, meaning that the 4 MSB

must no be changed.

The following procedure is used to write to the column latches:

•

Save and disable interrupt

•

Set bit EEE of EECON register

•

Load DPTR with the address to write

•

Store A register with the data to be written

•

Execute a MOVX @DPTR, A

•

If needed loop the three last instructions until the end of a 128 Bytes page

•

Restore interrupt

Note:

The last page address used when loading the column latch is the one used to select the

page programming address.

Programming

The EEPROM programming consists of the following actions:

•

Write one or more Bytes of one page in the column latches. Normally, all Bytes must

belong to the same page; if not, the last page address will be latched and the others

discarded.

•

Launch programming by writing the control sequence (50h followed by A0h) to the

EECON register.

•

EEBUSY flag in EECON is then set by hardware to indicate that programming is in

progress and that the EEPROM segment is not available for reading.

•

The end of programming is indicated by a hardware clear of the EEBUSY flag.

Note:

The sequence 5xh and Axh must be executed without instructions between then other-

wise the programming is aborted.

Read Data

The following procedure is used to read the data stored in the EEPROM memory:

•

Save and disable interrupt

•

Set bit EEE of EECON register

•

Load DPTR with the address to read

•

Execute a MOVX A, @DPTR

•

Restore interrupt

AT89C51CC02CA-RATUM 数据表(PDF) 31 Page - ATMEL Corporation

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