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ADIN1110CCPZ-R7 数据表(PDF) 46 Page - Analog Devices |
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ADIN1110CCPZ-R7 数据表(HTML) 46 Page - Analog Devices |
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46 / 107 page  Data Sheet ADIN1110 REGISTERS analog.com Rev. B | 46 of 107 Table 38. SPI Register Map (Continued) Address Name Description Reset Access 0x88 TS_TIMER_START TS_TIMER Counter Start Time Register. 0x00000000 R/W 0x89 TS_EXT_CAPT0 TS_CAPT Pin 0 Time Stamp Register. 0x00000000 R 0x8A TS_EXT_CAPT1 TS_CAPT Pin 1 Time Stamp Register. 0x00000000 R 0x8B TS_FREECNT_CAPT TS_CAPT Free Running Counter Register. 0x00000000 R 0x90 P1_RX_FSIZE P1 MAC Rx Frame Size Register. 0x00000000 R 0x91 P1_RX P1 MAC Receive Register. 0x00000000 R 0xA0 P1_RX_FRM_CNT P1 Rx Frame Count Register. 0x00000000 R 0xA1 P1_RX_BCAST_CNT P1 Rx Broadcast Frame Count Register. 0x00000000 R 0xA2 P1_RX_MCAST_CNT P1 Rx Multicast Frame Count Register. 0x00000000 R 0xA3 P1_RX_UCAST_CNT P1 Rx Unicast Frame Count Register. 0x00000000 R 0xA4 P1_RX_CRC_ERR_CNT P1 Rx CRC Errored Frame Count Register. 0x00000000 R 0xA5 P1_RX_ALGN_ERR_CNT P1 Rx Align Error Count Register. 0x00000000 R 0xA6 P1_RX_LS_ERR_CNT P1 Rx Long/Short Frame Error Count Register. 0x00000000 R 0xA7 P1_RX_PHY_ERR_CNT P1 Rx PHY Error Count Register. 0x00000000 R 0xA8 P1_TX_FRM_CNT P1 Tx Frame Count Register. 0x00000000 R 0xA9 P1_TX_BCAST_CNT P1 Tx Broadcast Frame Count Register. 0x00000000 R 0xAA P1_TX_MCAST_CNT P1 Tx Multicast Frame Count Register. 0x00000000 R 0xAB P1_TX_UCAST_CNT P1 Tx Unicast Frame Count Register. 0x00000000 R 0xAC P1_RX_DROP_FULL_CNT P1 Rx Frames Dropped Due to FIFO Full Register. 0x00000000 R 0xAD P1_RX_DROP_FILT_CNT P1 Rx Frames Dropped Due to Filtering Register. 0x00000000 R 0xAE P1_RX_IFG_ERR_CNT Frame Received on Port 1 with IFG Errors. 0x00000000 R 0xB0 P1_TX_IFG P1 Transmit Inter Frame Gap Register. 0x0000000B R/W 0xB3 P1_LOOP P1 MAC Loopback Enable Register. 0x00000000 R/W 0xB4 P1_RX_CRC_EN P1 CRC Check Enable on Receive Register. 0x00000001 R/W 0xB5 P1_RX_IFG P1 Receive Inter Frame Gap Register. 0x0000000A R/W 0xB6 P1_RX_MAX_LEN P1 Max Receive Frame Length Register. 0x00000618 R/W 0xB7 P1_RX_MIN_LEN P1 Min Receive Frame Length Register. 0x00000040 R/W 0xB8 P1_LO_RFC P1 Rx Low Priority FIFO Frame Count Register. 0x00000000 R 0xB9 P1_HI_RFC P1 Rx High Priority FIFO Frame Count Register. 0x00000000 R 0xBA P1_LO_RXSIZE P1 Low Priority Rx FIFO Valid Half Words Register. 0x00000000 R 0xBB P1_HI_RXSIZE P1 High Priority Rx FIFO Valid Half Words Register. 0x00000000 R Identification Version Register Address: 0x00, Reset: 0x00000010, Name: IDVER Table 39. Bit Descriptions for IDVER Bits Bit Name Description Reset Access [31:8] RESERVED Reserved. 0x0 R [7:4] MAJVER OPEN Alliance Major Version. Major version identifier of the OPEN Alliance serial 10BASE-T1x MAC-PHY interface specification supported by this device. 0x1 R [3:0] MINVER OPEN Alliance Minor Version. Minor version identifier of the OPEN Alliance serial 10BASE-T1x MAC-PHY interface specification supported by this device. 0x0 R |
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