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ADIN1110CCPZ-R7 数据表(PDF) 81 Page - Analog Devices |
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ADIN1110CCPZ-R7 数据表(HTML) 81 Page - Analog Devices |
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81 / 107 page  Data Sheet ADIN1110 REGISTERS analog.com Rev. B | 81 of 107 PCS MMD Devices in Package 1 Register Device Address: 0x03; Register Address: 0x0005, Reset: 0x008B, Name: PCS_DEVS_IN_PKG1 Table 142. Bit Descriptions for PCS_DEVS_IN_PKG1 Bits Bit Name Description Reset Access [15:0] PCS_DEVS_IN_PKG1 PCS MMD Devices in Package. Clause 22 registers and PMA/PMD, PCS, and autonegotiation MMDs are present. 0x8B R PCS MMD Devices in Package 2 Register Device Address: 0x03; Register Address: 0x0006, Reset: 0xC000, Name: PCS_DEVS_IN_PKG2 Vendor Specific Device 1 and Vendor Specific Device 2 MMDs are present. Table 143. Bit Descriptions for PCS_DEVS_IN_PKG2 Bits Bit Name Description Reset Access [15:0] PCS_DEVS_IN_PKG2 PCS MMD Devices in Package. Vendor Specific Device 1 and Vendor Specific Device 2 MMDs present 0xC000 R PCS Status 2 Register Device Address: 0x03; Register Address: 0x0008, Reset: 0x8000, Name: PCS_STAT2 Table 144. Bit Descriptions for PCS_STAT2 Bits Bit Name Description Reset Access [15:14] PCS_PRESENT PCS Present. Indicates that the PCS is present and responding. 0x2 R [13:0] RESERVED Reserved. 0x0 R 10BASE-T1L PCS Control Register Device Address: 0x03; Register Address: 0x08E6, Reset: 0x0000, Name: B10L_PCS_CNTRL This address corresponds to the 10BASE-T1L PCS control register specified in Clause 45.2.3.68a of Standard 802.3cg. Table 145. Bit Descriptions for B10L_PCS_CNTRL Bits Bit Name Description Reset Access 15 RESERVED Reserved. 0x0 R/W SC 14 B10L_LB_PCS_EN PCS Loopback Enable. When set to 1, this bit enables the 10BASE-T1L PCS loopback. 0x0 R/W [13:0] RESERVED Reserved. 0x0 R 10BASE-T1L PCS Status Register Device Address: 0x03; Register Address: 0x08E7, Reset: 0x0000, Name: B10L_PCS_STAT This address corresponds to the 10BASE-T1L PCS status register specified in Clause 45.2.3.68b of Standard 802.3cg. Table 146. Bit Descriptions for B10L_PCS_STAT Bits Bit Name Description Reset Access [15:3] RESERVED Reserved. 0x0 R 2 B10L_PCS_DSCR_STAT_OK_LL PCS Descrambler Status. When read as 1, this bit indicates that the 10BASE-T1L descrambler is locked. When read as 0, this bit indicates that the 10BASE-T1L descrambler has unlocked since the last time the bit was read. 0x0 R LL [1:0] RESERVED Reserved. 0x0 R |
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