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ADIN1110CCPZ-R7 数据表(PDF) 58 Page - Analog Devices |
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ADIN1110CCPZ-R7 数据表(HTML) 58 Page - Analog Devices |
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58 / 107 page  Data Sheet ADIN1110 REGISTERS analog.com Rev. B | 58 of 107 Table 66. Bit Descriptions for FIFO_SIZE Bits Bit Name Description Reset Access [31:12] RESERVED Reserved. 0x0 R [11:8] P1_RX_HI_SIZE Port 1 Rx High Priority FIFO Size. 0x4 R/W 0000: 0 kB. 0001: 2 kB. 0010: 4 kB. 0011: 6 kB. 0100: 8 kB. 0101: 10 kB. 0110: 12 kB. 0111: 14 kB. 1000: 16 kB. [7:4] P1_RX_LO_SIZE Port 1 Rx Low Priority FIFO Size. 0x6 R/W 0000: 0 kB. 0001: 2 kB. 0010: 4 kB. 0011: 6 kB. 0100: 8 kB. 0101: 10 kB. 0110: 12 kB. 0111: 14 kB. 1000: 16 kB. [3:0] HTX_SIZE Host Transmit FIFO Size. 0x4 R/W 0000: 0 kB. 0001: 2 kB. 0010: 4 kB. 0011: 6 kB. 0100: 8 kB. 0101: 10 kB. 0110: 12 kB. 0111: 14 kB. 1000: 16 kB. Tx FIFO Frame Count Register Address: 0x3F, Reset: 0x00000000, Name: TFC For debug only. Number of frames in the transmit FIFO. Table 67. Bit Descriptions for TFC Bits Bit Name Description Reset Access [31:9] RESERVED Reserved. 0x0 R [8:0] TFC Number of Frames in the Tx FIFO. 0x0 R Tx FIFO Valid Half Words Register Address: 0x40, Reset: 0x00000000, Name: TXSIZE Number of Valid Half Words (16 Bit) in the Host Tx FIFO. |
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