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ST7LITE49M 数据表(PDF) 12 Page - STMicroelectronics

部件名 ST7LITE49M
功能描述  8-bit MCU with single voltage Flash memory data EEPROM, ADC, 8/12-bit timers, and I²C interface
PDF  188 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE49M 数据表(HTML) 12 Page - STMicroelectronics

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ST7LITE49M
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Figure 49.
Block diagram of One Pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Figure 50.
One Pulse mode and PWM timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Figure 51.
Dynamic DCR2/3 update in One Pulse mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Figure 52.
Force Overflow timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Figure 53.
Lite timer 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105
Figure 54.
Input Capture timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 106
Figure 55.
I2C bus protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112
Figure 56.
I2C interface block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Figure 57.
Transfer sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118
Figure 58.
Event flags and interrupt generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119
Figure 59.
ADC block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Figure 60.
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142
Figure 61.
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143
Figure 62.
fCPU maximum operating frequency versus VDD supply voltage . . . . . . . . . . . . . . . . . . 145
Figure 63.
Frequency vs voltage at four different ambient temperatures (RC at 5 V) . . . . . . . . . . . . 148
Figure 64.
Frequency vs voltage at four different ambient temperatures (RC at 3.3 V). . . . . . . . . . . 148
Figure 65.
Accuracy in % vs voltage at 4 different ambient temperatures (RC at 5 V) . . . . . . . . . . . 149
Figure 66.
Accuracy in % vs voltage at 4 different ambient temperatures (RC at 3.3V) . . . . . . . . . . 149
Figure 67.
Typical IDD in Run vs. fCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Figure 68.
Typical IDD in WFI vs. fCPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Figure 69.
Typical IDD in Slow mode vs. fCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 151
Figure 70.
Typical IDD in Slow-Wait mode vs. fCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 152
Figure 71.
Typical IDD vs. temperature at VDD = 5V and fCPU = 8 MHz . . . . . . . . . . . . . . . . . . . . . 152
Figure 72.
Typical application with an external clock source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154
Figure 73.
Typical application with a crystal or ceramic resonator. . . . . . . . . . . . . . . . . . . . . . . . . . . 155
Figure 74.
Two typical applications with unused I/O pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Figure 75.
Rpu resistance versus voltage at four different temperatures . . . . . . . . . . . . . . . . . . . . . . 161
Figure 76.
Ipu current versus voltage at four different temperatures . . . . . . . . . . . . . . . . . . . . . . . . . 161
Figure 77.
Typical VOL at VDD = 2.4 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Figure 78.
Typical VOL at VDD = 3 V (standard). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Figure 79.
Typical VOL at VDD = 5 V (standard). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163
Figure 80.
Typical VOL at VDD = 2.4 V (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Figure 81.
Typical VOL at VDD = 3 V (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Figure 82.
Typical VOL at VDD = 5 V (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164
Figure 83.
Typical VOL vs. VDD at IIO = 2 mA (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Figure 84.
Typical VOL vs. VDD at IIO = 4 mA (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Figure 85.
Typical VOL vs VDD at IIO = 2 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 165
Figure 86.
Typical VOL vs VDD at IO = 8 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Figure 87.
Typical VOL vs VDD at IIO = 12 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Figure 88.
Typical VDD-VOH vs. IIO at VDD = 2.4 V (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . 166
Figure 89.
Typical VDD-VOH vs. IIO at VDD = 3 V (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Figure 90.
Typical VDD-VOH vs. IIO at VDD = 5 V (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 167
Figure 91.
Typical VDD-VOH vs. IIO at VDD = 2.4 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Figure 92.
Typical VDD-VOH vs. IIO at VDD = 3 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Figure 93.
Typical VDD-VOH vs. IIO at VDD = 5 V (standard) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 168
Figure 94.
Typical VDD-VOH vs. VDD at IIO = 2 mA (high sink) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Figure 95.
Typical VDD-VOH vs. VDD at IIO = 4 mA (high sink). . . . . . . . . . . . . . . . . . . . . . . . . . . . 169
Figure 96.
RESET pin protection when LVD is enabled3)4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
Figure 97.
RESET pin protection when LVD is disabled . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 172
Figure 98.
Typical application with ADC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
Figure 99.
ADC accuracy characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 174
Figure 100. 32-pin plastic dual in-line package, shrink 400mil width, package outline . . . . . . . . . . . . 184



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