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ST7LITE49M 数据表(PDF) 14 Page - STMicroelectronics |
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ST7LITE49M 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 188 page  Description ST7LITE49M 14/188 1 Description The ST7LITE49M is a member of the ST7 microcontroller family. All ST7 devices are based on a common industry-standard 8-bit core, featuring an enhanced instruction set. The ST7LITE49M features Flash memory with byte-by-byte In-Circuit Programming (ICP) and In-Application Programming (IAP) capability. Under software control, the ST7LITE49M device can be placed in Wait, Slow, or Halt mode, reducing power consumption when the application is in idle or standby state. The enhanced instruction set and addressing modes of the ST7 offer both power and flexibility to software developers, enabling the design of highly efficient and compact application code. In addition to standard 8-bit data management, all ST7 microcontrollers feature true bit manipulation, 8x8 unsigned multiplication and indirect addressing modes. The ST7LITE49M features an on-chip Debug Module (DM) to support In-Circuit Debugging (ICD). For a description of the DM registers, refer to the ST7 ICC Protocol Reference Manual. Figure 1. General block diagram 8-bit core ALU OSC1 OSC2 RESET Port A Internal clock Control RAM (384 bytes) PA7:0 (8 bits) VSS VDD Power Supply Flash (4K bytes) LVD, AVD Memory Ext. 1MHz Int. RC OSC 8-bit dual Lite timer Port B PB7:0 (8 bits) I2C 8 MHz OSC to 16MHz 10-bit ADC 12-bit Auto-reload CLKIN / 2 Watchdog Debug module Port C PC7:0 (8 bits) Data EEPROM (128 bytes) Program / 2 Int. 32 kHz dual timer RC OSC |
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