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ST7LITE49M 数据表(PDF) 43 Page - STMicroelectronics |
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ST7LITE49M 数据表(HTML) 43 Page - STMicroelectronics |
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43 / 188 page ![]() ST7LITE49M Supply, reset and clock management 43/188 Figure 17. Low Voltage Detector vs Reset Figure 18. Reset and supply management block diagram 7.4.2 Auxiliary Voltage Detector (AVD) The Voltage Detector function (AVD) is based on an analog comparison between a VIT-(AVD) and VIT+(AVD) reference value and the VDD main supply voltage (VAVD). The VIT-(AVD) reference value for falling voltage is lower than the VIT+(AVD) reference value for rising voltage in order to avoid parasitic detection (hysteresis). The output of the AVD comparator is directly readable by the application software through a real time status bit (AVDF) in the SICSR register. This bit is read only. Monitoring the VDD main supply The AVD threshold is selected by the AVD[1:0] bits in the AVDTHCR register. If the AVD interrupt is enabled, an interrupt is generated when the voltage crosses the VIT+(AVD) or VIT-(AVD) threshold (AVDF bit is set). In the case of a drop in voltage, the AVD interrupt acts as an early warning, allowing software to shut down safely before the LVD resets the microcontroller. See Figure 19. The interrupt on the rising edge is used to inform the application that the VDD warning state is over. VDD VIT+(LVD) RESET VIT-(LVD) Vhys LOW VOLTAGE DETECTOR (LVD) AUXILIARY VOLTAGE DETECTOR (AVD) RESET VSS VDD RESET SEQUENCE MANAGER (RSM) AVD Interrupt Request SYSTEM INTEGRITY MANAGEMENT WATCHDOG SICSR TIMER (WDG) AVDIE AVDF STATUS FLAG CR0 CR1 LVDRF 0 WDGF 0 |
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