ST7LITE49M datasheet(34/188 Pages) STMICROELECTRONICS

34 / 188 page

Supply, reset and clock management

ST7LITE49M

34/188

Supply, reset and clock management

The device includes a range of utility features for securing the application in critical

situations (for example in case of a power brown-out), and reducing the number of external

components. The main features are the following:

●

Clock Management

–

8 MHz internal RC oscillator (enabled by option byte)

–

Auto Wake Up RC oscillator (enabled by option byte)

–

1 to 16 MHz or 32kHz External crystal/ceramic resonator (selected by option byte)

–

External Clock Input (enabled by option byte)

●

Reset Sequence Manager (RSM)

●

System Integrity Management (SI)

–

Main supply Low voltage detection (LVD) with reset generation (enabled by option

byte)

–

Auxiliary Voltage detector (AVD) with interrupt capability for monitoring the main

supply (enabled by option byte)

7.1

RC oscillator adjustment

7.1.1

Internal RC oscillator

The device contains an internal RC oscillator with a specific accuracy for a given device,

temperature and voltage range (4.5V-5.5V). It must be calibrated to obtain the frequency

required in the application. This is done by software writing a 10-bit calibration value in the

RCCR (RC Control register) and in the bits 6:5 in the SICSR (SI Control Status register).

Whenever the microcontroller is reset, the RCCR returns to its default value (FFh), i.e. each

time the device is reset, the calibration value must be loaded in the RCCR. Predefined

calibration values are stored in EEPROM for 3 and 5 V VDD supply voltages at 25 °C (see

Table 5).

Table 5.

Predefined RC oscillator calibration values

RCCR

Conditions

ST7LITE49M

Address

RCCRH0

VDD= 5V

TA= 25°C

fRC = 8 MHz

DEE0h(1) (CR[9:2])

The DEE0h, DEE1h, DEE2h and DEE3h addresses are located in a reserved area in non-volatile memory.

They are read-only bytes for the application code. This area cannot be erased or programmed by any ICC

operations.

For compatibility reasons with the SICSR register, CR[1:0] bits are stored in the 5th and 6th position of

DEE1 and DEE3 addresses.

RCCRL0

DEE1h(1) (CR[1:0])

RCCRH1

VDD = 3.3 V

TA= 25°C

fRC = 8 MHz

DEE2h(1) (CR[9:2])

RCCRL1

DEE3h(1) (CR[1:0])

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