TMP93CS41 datasheet(5/248 Pages) TOSHIBA

5 / 248 page

TMP93CS40/TMP93CS41

2004-02-10

93CS40-3

Figure 1.1 TMP93CS40/TMP93CS41 Block Diagram

Port A

PA0 to PA6

PA7 (SCOUT)

10-bit 8-ch

converter

P50 to P57

(AN0 to AN7)

AVCC

AVSS

VREFH

VREFL

Serial I/O

(Channel 0)

Serial I/O

(Channel 1)

(TXD0) P90

(RXD0) P91

(SCLK0/ CTS0 ) P92

(TXD1) P93

(RXD1) P94

(SCLK1) P95

(PG00) P60

(PG01) P61

(PG02) P62

(PG03) P63

(PG10) P64

(PG11) P65

(PG12) P66

(PG13) P67

Pattern

generator

(Channel 0)

Pattern

generator

(Channel 1)

8-bit timer

(Timer 0)

8-bit timer

(Timer 1)

(TI0) P70

(TO1) P71

8-bit PWM

(Timer 2)

8-bit PWM

(Timer 3)

(TO2) P72

(TO3) P73

16-bit timer

(Timer 4)

16-bit timer

(Timer 5)

(INT4/TI4) P80

(INT5/TI5) P81

(TO4) P82

(TO5) P83

(INT6/TI6) P84

(INT7/TI7) P85

(TO6) P86

B C

D E

H L

XWA

XBC

XDE

XHL

XIX

XIY

XIZ

XSP

32 bits

P C

2-Kbyte RAM

64-Kbyte ROM

(Not included on the

TMP93CS41)

High-

frequency

OSC

VCC [3]

VSS [3]

CLK

Low-

frequency

OSC

XT1

XT2

AM8/ AM16

RESET

ALE

TEST1

TEST2

Interrupt

controller

P87 (INT0)

NMI

Watchdog

timer

WDTOUT

Port 0

P00 to P07

(AD0 to AD7)

Port 1

P10 to P17

(AD8 to AD15/A8 to A15)

Port 3

P30 ( RD )

P31 ( WR )

P32 ( HWR )

P33 ( WAIT )

P34 ( BUSRQ

)

P35 ( BUSAK )

P36 (

)

P37 ( RAS )

Port 2

P20 to P27

(A0 to A7/A16 to A23)

CS/WAIT

controller

(3 blocks)

P40 ( CS0 /

CAS

)

P41 ( CS1 /

CAS

)

P42 ( CS2 /

CAS

)

900/L CPU

TMP93CS41 数据表(PDF) 5 Page - Toshiba Semiconductor

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