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TMP93CS41 数据表(PDF) 154 Page - Toshiba Semiconductor |
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TMP93CS41 数据表(HTML) 154 Page - Toshiba Semiconductor |
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154 / 248 page  TMP93CS40/TMP93CS41 2004-02-10 93CS40-152 Figure 3.9.19 Time Difference Measurement (5) Different phased pulses output mode (This mode can be used only with timer 4.) In this mode, signals with any phase can be output by the free-running up counter UC4. When the value in up counter UC4 and the value in TREG4 (TREG5) match, the value in TFF4 (TFF5) is inverted and output to TO4 (TO5). Figure 3.9.20 Phase Output The periods of the output waveforms above (Expressed as counter overflow time) are listed in Table 3.9.2. Counter (Free running) Match with TREG5 TO4 Match with TREG4 TO5 C1 C2 Time difference Count clock (Internal clock) TI4 pin input TI5 pin input Loading UC4 into CAP1 Loading UC4 into CAP2 INT4 INT5 |
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