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TMP93CS41 数据表(PDF) 200 Page - Toshiba Semiconductor |
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TMP93CS41 数据表(HTML) 200 Page - Toshiba Semiconductor |
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200 / 248 page ![]() TMP93CS40/TMP93CS41 2004-02-10 93CS40-198 7 6 5 4 3 2 1 0 Bit symbol ADR01 ADR00 Read/Write R After reset Undefined ADREG04L (0060H) Function Lower 2 bits of AD result for AN0 or AN4 are stored. 7 6 5 4 3 2 1 0 Bit symbol ADR09 ADR08 ADR07 ADR06 ADR05 ADR04 ADR03 ADR02 Read/Write R After reset Undefined ADREG04H (0061H) Function Upper 8 bits of AD result for AN0 or AN4 are stored. 7 6 5 4 3 2 1 0 Bit symbol ADR11 ADR10 Read/Write R After reset Undefined ADREG15L (0062H) Function Lower 2 bits of AD result for AN1 or AN5 are stored. 7 6 5 4 3 2 1 0 Bit symbol ADR19 ADR18 ADR17 ADR16 ADR15 ADR14 ADR13 ADR12 Read/Write R After reset Undefined ADREG15H (0063H) Function Upper 8 bits of AD result for AN1 or AN5 are stored. Note: The result registers are used both as AN0 and AN4, AN1 and AN5, AN2 and AN6, and AN3 and AN7. They are stored in ADREG04, 15, 26, and 37. Figure 3.12.4 AD Conversion Result Register (ADREG04, ADREG15) (1/2) 0 1 2 987 654 3 0 1 2 765 43 0 1 2 7 654 3 MSB LSB ADREGXH ADREGXL This is 1 when the register is read. Converted data for channel X |
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