STCMB1 datasheet(51/59 Pages) STMICROELECTRONICS

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STCMB1

Debug modes

For debugging purposes the STCMB1 has the possibility to disable one stage a time.

At power-on, when the VCC voltage reaches the turn-on threshold, the internal logic checks

the level of some signals at the pin, and can disable the PFC or the HB stage as detailed

here following:



If the device is turned on with the voltage on the pin ZCD > 2.4 V, the PFC section is

disabled so that the HB resonant stage can work standalone.

In this debug mode the STCMB1 must be supplied by a dc voltage connected to the

PFC bulk cap and by an external VCC > VVCCOn, because the HV start-up is disabled.

After the start-up, if the self-supply circuitry is working properly, the resonant stage can

work self-supplied and the external VCC can be removed.

The dc brown-out function is disabled; therefore the resonant stage can work also with

an input voltage much lower than the nominal PFC output. In this case any of the HB

stage protections could work because of the abnormal condition.



If the device is turned on with the voltage on the pin HISEN_HB > 2.4 V, the HB

resonant section is disabled so that the PFC resonant stage can work standalone.

The HV start-up in this case can work charging the VCC capacitor but an external VCC

voltage from a dc supply is necessary for powering the STCMB1 after the start-up

phase. All other protections like the brown-in, brown-out, OCP, Dynamic OVP, FFP are

enabled.

STCMB1 layout hints

The layout of any converter is a very important phase in the design process needing the

required attention by the engineers. Even if it the layout phase looks sometimes time

consuming, a good layout surely saves time during the functional debugging and the

qualification phases and increases the robustness against the susceptibility tests.

Additionally, a power supply circuit with a correct layout needs smaller EMI filters or

less filter stages, so it will allow a consistent saving of the BOM cost.

The STCMB1 does not need to follow any special layout instruction, just following the

general layout rules for any power converter have to be applied wisely, especially for the

ground connections. The main, basic hints are indicated here following; they can be

implemented even if a single side PCB is used.

Keep power RTN separated by the signal RTN. Connect the return pins of the

component carrying the high current switched at high frequency such as the PFC

sense resistor, PFC MOSFET source, resonant capacitor, LLC low-side MOSFET

source as close as possible and converging on the latter. This point will be the RTN star

point. In case the half-bridge is far away from the PFC output bulk capacitor, this last

can be split in two capacitors located near the two stages, one capacitor close to the

PFC power section, the second one should be positioned close to the half-bridge

MOSFETs. This placement minimizes the differential mode noise produced by both

sections.

STCMB1 数据表(PDF) 51 Page - STMicroelectronics

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