STCMB1 datasheet(33/59 Pages) STMICROELECTRONICS

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STCMB1

Application information

There is a number of benefits resulting from these properties, which can be summarized as

follows:



Converter dynamics is very close to that of a first-order system: frequency

compensation is considerably simpler (a standard type 2 compensation scheme can be

used for optimum results) and its natural response to perturbations is overdamped.

This makes the system less prone to those small subharmonic oscillations that can be

sometimes observed as a result of switching noise or when secondary synchronous

rectification is used.



Load transient is considerably improved: overshoots and undershoots are significantly

smaller, settling times significantly shorter.



Input ripple rejection is improved: because of the simpler dynamics, the low frequency

gain of the feedback loop can be considerably larger (at least 15 - 20 dB), with

a corresponding reduction of the residual 100/120 Hz ripple on the output voltage.



Hard switchings at the start-up are prevented: it's inherent in the control methodology

to ensure that the half-bridge toggles when the tank current has the right sign in order

for the MOSFETs to achieve soft-switching.

For more information on the methodology, please refer to Section 11: Reference on

page 56.

7.18

HB: oscillator

The oscillator is programmed externally by means of a capacitor (CF), connected from the

CF pin to ground, and the network connected to the RFmin pin. The capacitor CF is charged

with a constant current starting from zero up to a peak value (= 1.5 V in continuous

switching) and then quickly discharged, thus originating a triangular sawtooth. The network

connected to the RFmin defines the charging current for the CF.

The RFmin pin provides an accurate 2 V reference capable of sourcing up to 2 mA; the

current IR sourced by the pin is internally mirrored and output from the CF pin. The mirroring

ratio, KM is typically 1. Therefore, the higher IR is, the faster CF is charged. The simplified

block diagram of the oscillator is shown in Figure 18. The circuitry that locks and

synchronizes the actual set of the oscillator ramp to the zero crossing of the tank current,

sensed at the ISEN_HB pin, is not shown for the sake of simplicity.

Figure 18. Oscillator block diagram

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