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STCMB1 数据表(PDF) 53 Page - STMicroelectronics |
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STCMB1 数据表(HTML) 53 Page - STMicroelectronics |
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53 / 59 page ![]() DocID028958 Rev 4 53/59 STCMB1 STCMB1 layout hints 59 8. Connect the RTN of signal components directly to the STCMB1 GND pin (pin #13). RTN of signal components relevant to the pins FB (pin #3), COMP (pin #4), TON (pin #5) CF (pin #7), CSS (pin #8) RFMIN (pin #9), STBY (pin #10) must not be involved in any different return path, it must be kept separated. Use ground tracks width more than 1 mm. Figure 32. Control circuitry hints 9. Connect the feedback optocoupler emitter to the signal RTN, close to the GND connection of oscillator components. Both optocoupler tracks have to be placed far from traces and pins operating with high voltage and high dV/dt. 10. Connect heatsinks to Power GND close to each relevant MOSFET source. Connect the PFC MOSFET heatsink to primary GND, close to the PFC MOSFET source. Connect the half-bridge MOSFETs heatsink, if present, to primary GND too and close to the LLC low-side MOSFET source. Never leave heatsinks floating. 11. Place an external copper band contacting the ferrite core of the boost inductor and connect it to GND. Grounding the core of the PFC inductor decreases the EMI (radiated noise) from the PFC inductor caused by the dV/dt; it improves the EMC performance of the SMPS. 12. Place the bootstrap capacitor close to the pins #20 and #18 of STCMB1. Do not place tracks relevant to the pins VBOOT, HVG an OUT close to signal pins or tracks, especially CF and other oscillator pins may be affected by disturbances because such pins operates with high voltage and high dV/dt. Furthermore, a) Minimum insulation distances of these tracks and relevant components, with respect to other low voltage parts, have be checked too. b) If an external bootstrap diode is needed, please locate it close to the STCMB1 pins minimizing the length of the tracks. |
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