STCMB1 datasheet(37/59 Pages) STMICROELECTRONICS

37 / 59 page

DocID028958 Rev 4

37/59

STCMB1

Application information

7.20

HB: improved burst mode operation at light-load

Despite the optimization of the LLC tank circuit allowed by the adaptive deadtime function

and the anti-capacitive protection function (see Section 7.21: HB: adaptive deadtime

(ADT)), the latest requirements on energy saving are so demanding that a significant

optimization effort is still needed to fulfill them.

To reduce this effort, the STCMB1 device implements a novel concept of the burst mode

operation that significantly increases the amount of energy carried by the converter in each

switching cycle. As a result, the average values of the switching frequency and the residual

magnetizing current are dramatically reduced and light-load efficiency further boosted.

While output power decreases, switching frequency increases up to a programmed level

fmax; the maximum frequency value fmax is reached when the voltage on the STBY pin

equals the internal voltage threshold VL (1.25 V typ.). When VSTBY  VL the STCMB1 enters

in idle state, its quiescent current consumption is reduced and the internal threshold is

shifted up to the restart value VL + Hys ( = 1.25 V + 40 mV).

In detail, the LLC is stopped as STBY goes below VL and restarted as STBY goes above VL

+ HYS. Furthermore, it is practically the master on the PFC whose the last pulse in the

switching packet is naturally stopped by TON = COMP - 1 V, while it is turned on with

a certain delay (10

s typ.) with respect to the first LLC pulse of the switching packet.

The novelty consists in an additional threshold located slightly over VH. When the voltage on

the STBY pin falls below this threshold the oscillator ramp peak value VCFp is increased.

This is clearly noticeable in the left side picture of Figure 21. In this way the average

switching frequency is reduced as long as voltage on the STBY pin remains between VH

and VL, and the converter efficiency is increased.

In other words, it is possible to obtain very short switching packets, but with a significant

energy content: so short that an inherent limit of having the LLC master on the PFC could be

highlighted. In fact, when the PFC is driven by the burst mode of the LLC, its loop is open

and its output voltage is defined by the energy transfer, from the mains to the bulk capacitor,

allowed by the length and the period of the switching packets. To overcome this problem, as

said, the last PFC pulse in the switching packet is reset by its natural mechanism (TON =

COMP - 1 V).

During the HB burst mode, the stop and restart are accurately controlled: the last cycle

before switching stoppage ends with a complete HVG pulse and the first cycle after

restarting is the LVG pulse (with half duration) to minimize the perturbations on the dc

voltage across the resonant capacitor Cr.

If the burst mode is not used connect the STBY pin (#10) to the RFmin (pin #9).

STCMB1 数据表(PDF) 37 Page - STMicroelectronics

STCMB1 数据表(HTML) 37 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

数据表下载