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STCMB1 数据表(PDF) 39 Page - STMicroelectronics

部件名 STCMB1
功能描述  TM PFC with X-cap discharge and LLC resonant combo controller
PDF  59 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STCMB1 数据表(HTML) 39 Page - STMicroelectronics

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STCMB1
Application information
59
the transition is completed, the output goes low. A monostable circuit, sensitive to negative-
going edges, releases a pulse that marks the end of the deadtime.
The derivative of HB voltage needed for the ADT function is implemented sensing the signal
current flowing through both the intrinsic Cgd capacitor of the external power MOS and the
LVG pin.
The signal current (isource/sink) is proportional to the derivative of HB voltage and Cgd value:
Equation 24
In order to ensure the right behavior of the ADT function, this current signal has to fulfill the
following:
Equation 25
isource/sink > Sdiff (SdiffMAX 4 mA)
where Sdiff is the minimum current signal which can be detected by the edge detector.
Cgd is a function of drain-source voltage of the LVG power MOS and the HB voltage slope is
not constant but it depends on the value of the current flowing in the resonant tank.
Therefore, in view of obtain reliable derivative detection, the following relationship has to be
fulfilled at least at the end of HB transition:
Equation 26
The adaptive dead time generator gives a minimum dead time of 220 ns (max.) and a
maximum dead time of 700 ns (min.), depending on the slope of the half bridge node. The
actual minimum observable dead time is about 120 ns, defined and limited by the internal
propagation delay. If, for some reason, the end of the half bridge transition were not
detected, then the dead time would last indefinitely.
To avoid this stall condition, a timeout of about 1
s on the dead time is applied: unless the
anti-capacitive protection mechanism is active (dead time made longer to let the current to
take the right sign), the turn-on of the MOSFET is forced at about 1
s from the turn-off of
the other.
According to Equation 26, a MOSFET with the small Crss and small switched tank current
could induce the unwanted generation of a minimum dead time to which a hard switch event
could be associated (MOSFET turns on before the end of the half bridge transition, but no
cross conduction). In these cases, a ceramic capacitor, up to 10 pF, between the drain of the
low side MOSFET and the LVG pin can solve this adaptive dead time generation issue. A
resistor, up to some k
, in series with the added capacitor and a Schottky diode, for
instance the BAV21, between the LVG and GND, will made the solution more robust. The
ceramic capacitor has to be high voltage rating. Figure 22 shows the proposed solution.
d t
d V
C
=
i=
i
H B
g d
C g d
k
s o u r c e / s i n



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