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STPM098C 数据表(PDF) 56 Page - STMicroelectronics |
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STPM098C 数据表(HTML) 56 Page - STMicroelectronics |
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56 / 110 page  Symbol Parameter Test condition Min Typ Max Unit Notes TSEN_ov_th TSEN overvoltage threshold 2.85 3 3.15 V Comparator output Low to high TSEN _ov_hys TSEN overvoltage hysteresis - 0 - mV - T_tsen_uv_flt TSEN undervoltage detection filter time CLK_SSM_EN = 0 75 - 100 μs Digital filter T_ tsen _ov_flt TSEN overvoltage detection filter time CLK_SSM_EN = 0 75 - 100 μs Digital filter 3.12.2 Output voltage telemetry The regulated output voltage of each loop is directly measured across input pins VSENn and VRTNn by means of a dedicated 12-bit ADC converter. The digitized voltage information is made available on PMBus™ paged register READ_VOUTn<15:0> [n=1, 2]. Table 47. Output voltage ADC electrical characteristics Symbol Parameter Test condition Min Typ Max Unit Notes ADC input VOUT_adc_range VOUT ADC voltage input range 0 - 3.5 V - ADC input Resolution VOUT_adc_resolution VOUT ADC resolution - 12 - bits Application information VOUT_adc_lsb VOUT ADC LSB - 0.952 - mV Application information ADC input accuracy VOUT_adc_total_err1 VOUT ADC total error1 0.5 V ≤ VID < 1.5 V -10 - 10 mV - VOUT_adc_total_err2 VOUT ADC total error2 1.5 V ≤ VID < 3.5 V -1 - 1 % - ADC input dynamic characteristics VOUT_adc_in_sr VOUT ADC sample rate CLK_SSM_EN = 0 - 10 - MHz Application information VOUT_adc_latency VOUT ADC conversion latency CLK_SSM_EN = 0 - 65 100 μs Application information 3.12.2.1 Output voltage monitor (VOUT monitor) The regulated output voltage level of each loop is monitored by means of dedicated UV and an OV diagnosis based on VOUTn conversion [n = 1, 2]. If VSENn-VRTNn ≤ VOUTn_uv_th occurs for an interval longer than T_vout_mon_detect_dly, fault is asserted and the VOUTn_UV flag is set. Fault pins are asserted LOW according to FHC configuration and FOR table [n = 1, 2]. If VSENn-VRTNn ≥ VOUTn_ov_th occurs for an interval longer than T_vout_mon_detect_dly fault is asserted and the VOUTn_OV flag is set. Fault pins are asserted LOW according to the FHC configuration and FOR table. VOUT_OV clearing depends on FHC configuration [n = 1, 2]. The reference thresholds for the VOUTn monitor unit VOUTn_uv_th and VOUT_ov_th can be separately configured through a dedicated PMBus™ register as follows: VOUTnUVTH=VOUTMONtℎlsb×VOUTnUVFAULTLIMIT8:0 (12) VOUTnOVTH=VOUTMONtℎlsb×VOUTnOVFAULTLIMIT8:0 (13) Where: VOUT_MON_th_lsb is the minimum voltage step [7.616 mV]. VOUTn_UV_FAULT_LIMIT/VOUTn_FAULT_LIMIT[8:0] are the dedicated PMBus™ configuration bits [0 V ~ 3.5 V]. The default value is VOUTn_UV_FAULT_LIMIT = 0x058 (670 mV). The default value is VOUTn_OV_FAULT_LIMIT = 0x06D (830 mV). STPM098C Functional description DS14440 - Rev 1 page 56/110 |
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