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STPM098C 数据表(PDF) 24 Page - STMicroelectronics |
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STPM098C 数据表(HTML) 24 Page - STMicroelectronics |
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24 / 110 page  Fault flag Source diagnosis Self- check Failure reaction Fault description TSENn_OV = 1 TSEN monitor YES Configurable Overvoltage on TSENn [n = 1, 2] TSENn_UV = 1 TSEN monitor YES Configurable Undervoltage on TSENn [n = 1, 2] VSENn_DISC = 1 FB disconnection monitor YES Configurable Feedback disconnection on VSENn [n = 1, 2] VRTNn_DISC = 1 FB disconnection monitor YES Configurable Feedback disconnection on VSENn [n = 1, 2] IOUTn_SHARING_WR = 1 IOUT monitor NO Flag only (IGN) Phase current overbalancing IOUTn_UC_ = 1 IOUT monitor NO Configurable Phase undercurrent (phase fault) PMBUS_ERR = 1 PMBus™ monitor NA Ignore command PMBus™ comm fault NVM_CRC_FAIL = 1 NVM data CRC check NA SAFE_HIZ (LTC) NVM data CRC check SRR_CRC_FAIL = 1 SRR data CRC check NA SAFE_HIZ (LTC) SRR data CRC check NA MBIST NA LOCKUP MBIST failure ABIST_FAIL = 1 ABIST NA Flag only (IGN) ABIST failure 1. Phase positive and negative overcurrents share the same flag. 2. TSENn_OT_WR fault reaction is always ignored and cannot be configured differently. The related FHC register allows to enable/disable the related pin signaling. 3.4.1 Fault handling configuration (FHC) registers The STPM098C default FHM configuration can be modified by properly writing the FHC registers through CONFIG mode. FHC are considered as SRR (safety relevant registers). 3.4.1.1 Fault reaction configuration (FRC) For each of the configurable faults listed in the Table 18 (except overvoltage on VSENn) a configuration bit allows to define whether the corrective action shall be automatically implemented by the device itself or if it can be waived. Table 19. Fault reaction configuration bits <FLT_REF>_FAULT_RESPONSE Description 0 Ignore - ignore fault detection, device remains in NORMAL mode(1) 1 Latched - disable all PWM outputs, device moves to SAFE_HIZ mode (default)(2) 1. Fault danger for the application is considered low. The fault can be ignored with no corrective action applied neither internal or external. 2. Fault danger for the application is considered high. The corrective action shall be taken as soon as it is detected by the device by establishing SAFE_HIZ. Overvoltage on VSENn fault handling configuration allows three different mechanisms programmable through two configuration bits. Table 20. VSENn_OV reaction configuration bits <FLT_REF>_FAULT_RESPONSE1 <FLT_REF>_FAULT_RESPONSE Description 0 0 Ignore - ignores fault detection, device remains in NORMAL mode(1) 0 1 Latched - disables all PWM outputs, device moves to SAFE_HIZ mode(2) 1 0 Unused STPM098C Functional description DS14440 - Rev 1 page 24/110 |
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