STPM098C datasheet(63/110 Pages) STMICROELECTRONICS

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If ISENn-CFILT/VREF1 ≥ IOUTm_oc_pos_fast_th occurs IOUTm_oc_pos_fast_retry times consecutively, the

IOUTn_OC_POS_FAST flag is set. Fault pins and safe state activation depend on FHC configuration.

IOUTn_OC_POS_FAST clearing depends on FHC configuration [n = 1, 2, 3, 4, 5, 6, 7, 8] and [m = 1, 2].

If ISENn-CFILT/VREF1 ≤ -IOUTm_oc_neg_slow_th occurs IOUTm_oc_neg_slow_retry times consecutively, the

IOUTn_OC_NEG_SLOW flag is set. Fault pins and safe state activation depend on FHC configuration.

IOUTn_OC_NEG_SLOW clearing depends on FHC configuration [n = 1, 2, 3, 4, 5, 6, 7, 8] and [m = 1, 2].

Where m is the loop reference.

Single-phase overcurrent comparators are safety relevant and then a self-check procedure is implemented.

The reference thresholds for the IOUTn overcurrent monitor unit IOUTm_oc_pos_slow_th,

IOUTm_oc_neg_slow_th and IOUTm_oc_pos_fast_th can be separately configured for loop 1 and 2 through

dedicated PMBus™ register as follows:

IOUTmOCPOSSLOWTH=IOUTMONOCtℎlsb×IOUTmOCPOSSLOWTH9:0

(18)

IOUTmOCPOSFASTTH=IOUTMONOCtℎlsb×IOUTmOCPOSFASTTH9:0

(19)

IOUTmOCNEGSLOWTH=IOUTMONOCtℎlsb×IOUTmOCNEGSLOWTH9:0

(20)

Where:

IOUT_MON_OC_th_lsb is the minimum voltage step.

IOUTm_OC_POS_SLOW_TH, IOUTm_OC_POS_FAST_TH and IOUTm_OC_NEG_SLOW_TH, are the

dedicated PMBus™ configuration bits.

Note:

For a correct functionality of the single phase FAST overcurrent diagnosis, the following relationship must be

fulfilled under every system condition:

ISENn−VREF1CFILT−IOUTmOCPOSFASTTH<125mV

[n = 1, 2, 3, 4, 5, 6, 7, 8]

A correct single-phase FAST overcurrent operation is not guaranteed when the previous relationship is not

guaranteed.

Example:

ISENn maximum value (maximum DrMOS current monitor output) = 2.055 V; then IOUTm_OC_POS_FAST_TH =

130 mV (2.055 V ~ 1.8 V ~ 125 mV) is the minimum valid threshold to get correct diagnosis operation.

Default values are:

IOUTm_OC_POS_SLOW_TH = 0x348 (210 mV, 42 A)

IOUTm_OC_POS_FAST_TH = 0x384 (225 mV, 45 A)

IOUTm_OC_NEG_SLOW_TH = 0x348 (210 mV, 42 A)

In case any of the above listed thresholds is 0, the related overcurrent monitor function is disabled and no

detection is performed.

The reference retry times for the IOUTn overcurrent monitor unit IOUTm_oc_pos_slow_retry,

IOUTm_oc_neg_slow_ retry and IOUTm_oc_pos_fast_retry can be separately configured for loop 1 and 2

through dedicated PMBus™ registers as follows:

IOUTmOCPOSSLOWRETRY=IOUTMONOCretrylsb×IOUTmOCPOSSLOWRETRY9:0

(21)

IOUTmOCPOSSFASTRETRY=IOUTMONOCretrylsb×IOUTmOCPOSFASTRETRY9:0

(22)

IOUTmOCNEGSLOWRETRY=IOUTMONOCretrylsb×IOUTmOCNEGSLOWRETRY9:0

(23)

Where:

IOUT_MON_OC_retry_lsb is the minimum step.

IOUTm_OC_POS_SLOW/FAST_RETRY and IOUTm_OC_NEG_SLOW_RETRY[7:0] are the dedicated PMBus™

configuration bits.

Default values are:

IOUTn_OC_POS_SLOW_RETRY = 0x80 (128)

IOUTm_OC_POS_FAST_RETRY = 0x01 (1)

IOUTn_OC_NEG_SLOW_RETRY = 0x80 (128)

STPM098C

Functional description

DS14440 - Rev 1

page 63/110

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