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STPM098C 数据表(PDF) 83 Page - STMicroelectronics |
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STPM098C 数据表(HTML) 83 Page - STMicroelectronics |
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83 / 110 page  3.14.6.4 Phase current balancing (PCB) STPM098C integrates an in-loop current balancing architecture in order to control the phase current balancing. This feature is accomplished by converting cycle by cycle the difference between the single phase current and the loop average phase current. The converted value optionally multiplied by a factor A, is used to fine-tune the single phase ON time to equalize all phase currents. Figure 67. Phase current balancing simplified block diagram DIGITAL ISEN1 CFILT/VREF1 ISENm G G ISEN2 GND G Iimi=1 Im I2 I1 1m Iimi=1 + - Comp1 GND FF 40MHz Up/Down 1=Up 0=Down Phase1 ON Time Correction R PWMn rising edge CS_COEFF<7:0> A The current balancing gain can be programmed by means of a dedicated PMBus™ command as follows: A=CSCOEFF7:0×2−6 (50) Where: CS_COEFF [7:0] is the dedicated PMBus™ configuration register [1 ~ 256]. The default value is CS_COEFF = 0x80. STPM098C Functional description DS14440 - Rev 1 page 83/110 |
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